Lateral Field Plate Gate Structures for High-Voltage GaN Transistors
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Solution Overview
Problem
Conventional field-effect transistors (FETs) face issues such as current collapse and reliability degradation due to high electric field strengths at the drain end of the gate, leading to reduced power performance and potential material cracking in GaN-based HEMTs, especially under high voltage operations.
Innovation Solution
The integration of lateral field plates adjacent to the gate electrode, with a dielectric layer between the field plates and the channel, modulates the electric field near the drain or source electrodes, alleviating the high electric field strength and enhancing breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional top-gated HEMT with a field plate is used, then the electric field near the drain-side of the gate contact is alleviated, but the device complexity increases due to the additional field plate structure
Solution Approach 1:
The patent merges the gate electrode and field plate into a single integrated gate electrode structure. The gate electrode is designed with an extended region that functions as the field plate, eliminating the need for separate field plate structures while maintaining the electric field alleviation effect. This integration reduces device complexity and fabrication steps.
Solution Approach 2:
The gate electrode is designed to perform multiple functions: it serves as both the control electrode for channel modulation and as the field plate for electric field management. The extended gate electrode structure simultaneously provides gate control and field plate protection functions, reducing the need for additional components.
2Ease of operation
If the gate electrode is disposed on top of the semiconductor surface to modulate drain current, then the transistor provides effective gate control, but the electric field strength becomes largest at the drain end of the gate during high voltage operation, causing current collapse and reliability degradation
Solution Approach 1:
The patent transitions from a conventional planar gate structure to a three-dimensional gate electrode structure with vertical sidewalls and an extended region. This dimensional change allows the gate to provide both top-down electric field control and lateral field plate protection, effectively managing electric fields in multiple dimensions simultaneously.
Solution Approach 2:
The gate electrode is designed with different functional regions: the main gate portion for channel control and the extended region with vertical sidewalls for field plate protection. Each region has optimized geometry to perform its specific function, with the extended region specifically designed to alleviate electric field concentration at the drain end.
3Productivity
If multiple channels are used in laterally-gated transistors to increase power density, then the current handling capability increases, but the electric field management becomes more complex and reliability challenges persist
Solution Approach 1:
The patent divides the channel into multiple parallel channels, each controlled by its own gate electrode structure. This segmentation allows independent optimization of each channel's electric field management while achieving high overall power density. Each segmented channel benefits from the field plate effect independently.
Solution Approach 2:
Multiple gate electrode structures are merged into a common configuration where each gate electrode shares the same extended field plate design. This unified approach to multi-channel devices ensures consistent electric field management across all channels while maintaining high power density through parallel current paths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases breakdown voltage, suppresses current collapse, and improves reliability by reducing off-state gate leakage and dynamic on-resistance, especially during high-voltage switching operations.
Implementation Method 1
The lateral field plate is in contact with the dielectric layer and is configured to modulate an electric field proximal to the gate electrode proximal to at least one of or both the drain or source electrodes
Data Source
AI summary
Laterally-gated transistors and lateral Schottky diodes are disclosed. The FET includes a substrate, source and drain electrodes, channel, a gate electrode structure, and a dielectric layer. The gate electrode structure includes an electrode in contact with the channel and a lateral field plate adjacent to the electrode. The dielectric layer is disposed between the lateral field plate and the channel. The lateral field plate contacts the dielectric layer and to modulate an electric field proximal to the gate electrode proximal to the drain or source electrodes. Also disclosed is a gate electrode structure with lateral field plates symmetrically disposed relative to the gate electrode. Also disclosed in a substrate with dielectric structures buried in the substrate remote from the gate electrode structure. A lateral Schottky diode having an anode structure includes an anode (A), cathodes (C) and lateral field plates located between the anode and the cathodes.