Lateral Ground Select Transistors for 3D NAND Integration
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Solution Overview
Problem
The challenge in semiconductor devices is to increase the degree of integration while reducing manufacturing costs, particularly in 3D memory devices, where high-cost equipment is required for fine pattern formation, limiting the integration of 2D semiconductor memory devices.
Innovation Solution
The implementation of vertically-stacked nonvolatile memory cells with lateral ground select transistors having different threshold voltages to selectively couple memory cells to common source lines, optimizing the doping concentration and structure to reduce series resistance and enhance integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If vertically-stacked strings of nonvolatile memory cells are used to increase integration density, then the degree of integration is improved, but series resistance between memory cells and common source lines increases
Solution Approach 1:
Lateral ground select transistors are introduced as intermediary components between the vertically-stacked memory cell strings and the common source lines. These transistors provide low-resistance lateral conduction paths that mediate the electrical connection, reducing the series resistance problem while maintaining the high integration density of the vertical architecture.
Solution Approach 2:
The patent transitions from purely vertical connections to include lateral connections by positioning ground select transistors in the lateral dimension. This dimensional change creates additional conduction pathways that reduce resistance without compromising the vertical stacking density.
2Reliability
If lateral ground select transistors are introduced to reduce series resistance, then electrical connection is improved, but device complexity increases
Solution Approach 1:
The lateral ground select transistors serve multiple functions: they reduce series resistance, provide ground selection capability, and enable selective coupling of memory cell strings to common source lines. This multi-functionality justifies the added structural complexity by delivering multiple benefits from a single component addition.
3Adaptability or versatility
If different threshold voltages are assigned to lateral ground select transistors for selective coupling, then memory cell selectivity is improved, but manufacturing precision requirements increase
Solution Approach 1:
Different threshold voltages are achieved by applying different doping concentrations to specific lateral ground select transistors based on their local requirements. The doping concentration is tailored locally to each transistor's position and function, with closer strings receiving higher doping for lower threshold voltages, and farther strings receiving lower doping for higher threshold voltages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables a higher degree of integration in 3D memory devices, reducing manufacturing costs and improving performance by maintaining low series resistance and minimizing current dispersion between memory cells.
Implementation Method 1
lateral ground select transistors having different threshold voltages that account for different lateral spacings between the vertically-stacked strings of nonvolatile memory cells and the common source lines
Implementation Method 2
optimizing the doping concentration and structure to reduce series resistance
Data Source
AI summary
Nonvolatile memory devices utilize vertically-stacked strings of nonvolatile memory cells (e.g., NAND-type strings) that can be selectively coupled to common source lines within a substrate. This selective coupling may be provided by lateral ground select transistors having different threshold voltages that account for different lateral spacings between the vertically-stacked strings of nonvolatile memory cells and the common source lines.