Lateral Power Device With High-K Sockets and PN Super Junction
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Solution Overview
Problem
Conventional lateral power devices face a trade-off between high breakdown voltage and low specific on-resistance, with existing techniques unable to significantly reduce specific on-resistance beyond the limitations set by drift region doping concentration and junction depth, and previous methods using high permittivity pillars or accumulation effects failing to provide substantial improvements.
Innovation Solution
The introduction of a novel lateral junction high-K MOS device (LJHMOS) structure featuring high permittivity sockets and a PN alternating super junction, which reduces specific on-resistance by enhancing charge balance and potential modulation through the use of high permittivity materials and dielectric layers, allowing for a significant increase in carrier density without additional doping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If higher doping concentration or larger junction depth is used for drift region, then specific on-resistance is reduced, but breakdown voltage is compromised due to RESURF condition limitations
Solution Approach 1:
The patent changes the doping type parameter of the drift region from conventional single-type (N- or P-) to alternating P-N-P-N structure, enabling higher effective doping concentration while maintaining RESURF conditions for high breakdown voltage, thus reducing specific on-resistance without compromising voltage sustain capability
Solution Approach 2:
The patent creates a composite doping structure in the drift region by combining alternating P- and N- doped layers, which work together to provide both high breakdown voltage through charge balance and low specific on-resistance through increased effective doping concentration
2Manufacturing precision
If thin SiO2 dielectric is used to introduce accumulation effect, then specific on-resistance is reduced, but the dielectric is fragile for high voltage and may cause potential gathering
Solution Approach 1:
The patent changes the dielectric material parameter from low-permittivity SiO2 to high-permittivity materials (such as HfO2, SrTiO3, or Pb(Zr,Ti)O3), which provide stronger accumulation effect at greater thickness, reducing specific on-resistance while maintaining or improving breakdown voltage through better electric field distribution
3Reliability
If high permittivity pillars are inserted into drift region, then breakdown voltage is improved, but carrier accumulation effect does not occur at device on state since pillars have no contact with gate
Solution Approach 1:
The patent merges the functions of high permittivity pillars and drift region by making the pillars an integral part of the drift region structure, with alternating P-N-P-N doping extending throughout the pillar volume, enabling both breakdown voltage improvement through potential modulation and carrier accumulation through gate contact
4Ease of manufacture
If conventional lateral power device structure is used, then manufacturing is simple, but specific on-resistance is confined by RESURF condition trade-off
Solution Approach 1:
The patent segments the drift region into alternating P- and N- doped layers, which can be formed through sequential ion implantation or diffusion steps, maintaining manufacturing feasibility while achieving superior electrical performance through the composite doping structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The LJHMOS achieves a substantial reduction in specific on-resistance, enabling a smaller device size with maintained breakdown voltage and reduced parasitic capacitance, thereby improving power device performance and efficiency.
Implementation Method 1
the boundaries of isolation region are formed by the high permittivity material sockets and the first dielectric layer
Implementation Method 2
the accumulation effects can be introduced to the drift region by using thin SiO2 dielectric, so that the electron carrier density is boosted with no additional doping
Data Source
AI summary
Provided is a lateral power device having low specific ON-resistance and using a high-dielectric constant socket structure and a manufacturing method therefor, which relate to semiconductor power devices. A source electrode (8) of the device is of a first conduction type, and a channel region (6), a silicon substrate (4) and an ohmic contact heavily-doped region are of a second conduction type; at least two isolation regions are arranged in an embedded manner in a drift region (1); between the isolation regions are the drift region (1) and the channel region (6); each isolation region extends from the source electrode (8) to a drain electrode (11); high-dielectric constant material strips (3) and first insulation dielectric layers (10) form boundaries of the bottoms and sidewalls of the isolation regions; the isolation regions are filled with a first filling material (2), a second insulation dielectric layer (9) is arranged on the upper surface of the drift region (1) and the upper surfaces of the isolation regions, and a gate electrode (5) directly contacts the first filling material (2) via holes on the second insulation dielectric layer (9); and a source electrode lead-out wire (16) and a drain electrode lead-out wire (12) directly contact the source electrode (8) and the drain electrode (11) respectively via the holes on the second insulation dielectric layer (9). The area of a power device can be greatly reduced on the premise of not reducing the withstand voltage and not increasing the specific ON-resistance.