Lateral Super Junction Device with Avalanche Clamp Diode
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Solution Overview
Problem
Conventional semiconductor power devices with super-junction structures face manufacturability difficulties due to complex and costly processes, particularly in achieving high-density alternately doped columns, which affect on-resistance and breakdown voltage performance.
Innovation Solution
A lateral power device with a super-junction structure is developed, featuring a buried N-buffer layer and a built-in avalanche clamp diode, which reduces electrical field crowding and enhances breakdown voltage, allowing for improved unclamped inductive switching performance without the need for complex masking and epitaxial growth steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If vertical super junction structure with high density alternately doped columns is implemented, then on-resistance is reduced and breakdown voltage is maintained, but manufacturing complexity and cost increase significantly
Solution Approach 1:
The patent transitions from a vertical super junction structure to a lateral super junction structure. This dimensional change allows the device to achieve high breakdown voltage and low on-resistance through horizontal layer stacking rather than vertical columnar doping, significantly simplifying the manufacturing process while maintaining performance
2Manufacturing precision
If high density alternately doped columns are formed, then on-resistance decreases, but the number of masking, implantation and epitaxial growth steps increases
Solution Approach 1:
By switching to a lateral structure with horizontal layers, the patent eliminates the need for numerous sequential masking and implantation steps required for vertical high-density columns. The super junction effect is achieved through alternating N-type and P-type layers stacked horizontally, dramatically improving manufacturing efficiency
Solution Approach 2:
The patent integrates the source, drain, and gate structures into a lateral configuration where N-type columns serve as source/drain regions and P-type columns as gate regions, all formed through simplified epitaxial growth processes rather than multiple discrete steps
3Ease of manufacture
If lateral super junction structure is used, then manufacturing is simplified, but drain-substrate breakdown voltage is limited
Solution Approach 1:
The patent introduces a buried N-type buffer layer between the P-type substrate and the lateral super junction structure. This intermediary layer serves dual purposes: it simplifies manufacturing by providing a ready-made interface and simultaneously enhances the drain-substrate breakdown voltage by creating a favorable doping profile that prevents premature breakdown
4Reliability
If conventional lateral super junction device is configured, then UIS performance is restricted, but structural modifications increase complexity
Solution Approach 1:
The buried N-type buffer layer acts as an intermediary that improves unclamped inductive switching performance by providing a controlled breakdown path and preventing avalanche multiplication in the super junction region, thereby enhancing reliability without adding structural complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient manufacturing of semiconductor power devices with reduced on-resistance and increased breakdown voltage, improving UIS performance and simplifying the manufacturing process by using a buried N-buffer layer and a built-in avalanche clamp diode.
Implementation Method 1
The peak electric field under the drain can be significantly reduced minimizing the E-field increase due to the cylindrical junction between the drain trench and the substrate
Implementation Method 2
a built-in clamp diode to divert all avalanche current from the super junction sections of the device
Data Source
AI summary
This invention discloses configurations and methods to manufacture lateral power device including a super-junction structure with an avalanche clamp diode formed between the drain and the gate. The lateral super-junction structure reduces on-resistance, while the structural enhancements, including an avalanche clamping diode and an N buffer region, increase the breakdown voltage between substrate and drain and improve unclamped inductive switching (UIS) performance.