Micro-Granular IC Delay Testing Through Launch-Capture Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional testing methods for configurable integrated circuits (ICs) fail to accurately measure performance due to large transistor-to-transistor variations and flaws, leading to potential malfunction or substandard performance, especially under high switching rates and varying operational paths.
Innovation Solution
The implementation of launch-capture testing, which involves configuring the IC with launch and capture elements to break down long signal paths into smaller segments, allowing for micro-granular testing of signal-path delay and verifying operation through the configuration/debug network, while operating the IC in user mode to simulate real-world conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional aggregate testing methods are used, then testing simplicity is maintained, but measurement precision deteriorates due to large transistor-to-transistor variations masking individual component failures
Solution Approach 1:
The patent divides long signal paths into multiple smaller segments by inserting launch and capture elements at intermediate points. This segmentation allows each segment to be tested independently with micro-granular resolution, enabling precise measurement of individual transistor and wire delays that would otherwise be masked in aggregate measurements. The segmentation principle directly resolves the contradiction by trading increased testing structure complexity for dramatically improved measurement precision.
2Productivity
If minimum width transistors are used to increase circuit density, then productivity is improved, but reliability deteriorates due to large transistor-to-transistor variations and slower operation
Solution Approach 1:
The patent replaces physical transistor size scaling with a testing-based approach to ensure reliability. Instead of relying on larger transistors to guarantee performance (which would reduce density), the patent uses launch-capture testing with micro-granular resolution to detect and account for variations in minimum-width transistors. This substitution of physical design margins with measurement and detection capabilities maintains both high density and reliability.
3Speed
If high switching rates are used to increase operating speed, then speed is improved, but measurement precision deteriorates due to power supply stress and temperature elevation affecting performance
Solution Approach 1:
The patent performs preliminary characterization of circuit performance at high switching rates using launch-capture testing before actual operation. By measuring signal-path delays, power supply variations, and temperature changes in advance, the system establishes baseline data that accounts for the effects of high-speed operation. This preliminary measurement allows for accurate performance assessment despite the harsh conditions created by high switching rates.
Data Source
AI summary
A method for testing a set of circuitry in an integrated circuit (IC) is described. The IC includes multiple configurable circuits for configurably performing multiple operations. The method configures the IC to operate in a user mode with a set of test paths that satisfies a set of evaluation criteria. Each test path includes a controllable storage element for controllably storing a signal that the storage element receives. The method operates the IC in user mode. The method reads the values stored in the storage elements to determine whether the set of circuitry is operating within specified performance limits.