Layer Transfer to Low-Dielectric Glass Support for IC Parasitic Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The scaling of features in integrated circuits faces challenges due to increasing parasitic effects associated with silicon-based support structures, which affect the performance of frontend devices such as transistors, and there is a need to optimize device performance and interconnect efficiency.
Innovation Solution
The method involves fabricating integrated circuit (IC) devices using layer transfer onto a non-semiconductor support structure with a dielectric constant lower than silicon, such as glass, to reduce parasitic effects, and bonding a non-semiconductor support structure with a lower dielectric constant to the exposed frontend layer, allowing the device layer with semiconductor material to be transferred onto this support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon-based support structures are used, then mechanical strength and structural stability are maintained, but parasitic effects increase and device performance deteriorates
Solution Approach 1:
The patent changes the dielectric constant parameter of the support structure material from silicon (high dielectric constant) to glass or ceramic materials (lower dielectric constant). This parameter change reduces parasitic capacitance effects while maintaining the mechanical support function, thereby improving device performance without sacrificing structural stability.
Solution Approach 2:
The patent employs composite material structures where glass or ceramic materials are used as the support structure instead of pure silicon. These materials provide both mechanical strength and lower parasitic effects, effectively combining the benefits of structural integrity with reduced electromagnetic interference.
2Productivity
If feature scaling continues, then device density increases, but parasitic effects from support structures become more significant
Solution Approach 1:
By changing the material parameter (dielectric constant) of the support structure to a lower value, the patent enables continued feature scaling without the parasitic effects becoming prohibitive. The lower dielectric constant material allows higher device density while maintaining acceptable performance levels.
3Reliability
If non-semiconductor support structures with lower dielectric constant are used, then parasitic effects decrease, but manufacturing complexity increases due to layer transfer processes
Solution Approach 1:
The device layer is fabricated on the glass or ceramic support structure before the final device assembly. This preliminary action allows the use of lower dielectric constant materials from the outset, reducing parasitic effects while the layer transfer process is integrated into the existing manufacturing workflow.
Solution Approach 2:
The patent uses an intermediary layer transfer process that bridges the fabrication of device layers on glass/ceramic substrates with the final device assembly. This intermediary process manages the manufacturing complexity by providing a systematic approach to transferring and integrating layers on non-traditional substrates.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively decreases parasitic effects in IC devices by using a non-semiconductor support structure with a lower dielectric constant, improving the performance and efficiency of frontend devices and interconnects.
Implementation Method 1
bonding a support structure of a non-semiconductor material having a dielectric constant that is smaller than a dielectric constant of silicon
Data Source
Figure 1
Figure 2A~2B
Figure 3A~3B
AI summary
Embodiments of the present disclosure relate to methods of fabricating IC devices using layer transfer and resulting IC devices, assemblies, and systems. An example method includes fabricating a device layer over a semiconductor support structure, the device layer comprising a plurality of frontend devices; attaching the semiconductor support structure with the device layer to a carrier substrate so that the device layer is closer to the carrier substrate than the semiconductor support structure; removing at least a portion of the semiconductor support structure to expose the device layer; and bonding a support structure of a non-semiconductor material having a dielectric constant that is smaller than a dielectric constant of silicon (e.g., a glass wafer) to the exposed frontend layer. The carrier substrate may then be removed.