Circulant Update Scheduling in Layered LDPC Decoders
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Solution Overview
Problem
Layered LDPC decoders face limitations due to high power consumption and memory size requirements, primarily driven by the number of memory accesses required during decoding, which hinders performance and efficiency.
Innovation Solution
The proposed solution involves optimizing the circulant update schedule in LDPC decoders by reducing memory accesses through strategic buffering and circulant pairing, allowing for updates in a single clock cycle or consecutive clock cycles, and utilizing a circulant update schedule based on layer gap indices to minimize memory access, thereby reducing power consumption and memory area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional layered decoding scheduling is used, then decoding accuracy is improved, but power consumption increases and memory size requirements increase
Solution Approach 1:
The patent pre-calculates and stores circulant update schedules and layer gap indices before decoding operations. This preliminary preparation allows the decoder to follow optimized update patterns that reduce redundant memory accesses during actual decoding, thereby lowering power consumption while maintaining decoding accuracy.
Solution Approach 2:
The patent changes the parameters of the decoding schedule by introducing layer gap indices and optimized circulant update patterns. These parameter modifications reorganize the sequence and timing of memory accesses to minimize the total number of accesses required, reducing power consumption without compromising decoding performance.
2Reliability
If traditional layered decoding scheduling is used, then decoding accuracy is improved, but memory area increases
Solution Approach 1:
The patent pre-calculates and stores circulant update schedules and layer gap indices before decoding operations. This preliminary preparation allows the decoder to follow optimized update patterns that reduce redundant memory accesses during actual decoding, thereby lowering power consumption while maintaining decoding accuracy.
Solution Approach 2:
The patent changes the parameters of the decoding schedule by introducing layer gap indices and optimized circulant update patterns. These parameter modifications reorganize the sequence and timing of memory accesses to minimize the total number of accesses required, reducing power consumption without compromising decoding performance.
3Reliability
If more memory accesses are performed, then decoding completeness is improved, but power consumption increases
Solution Approach 1:
The patent changes the parameters of the decoding schedule by introducing layer gap indices and optimized circulant update patterns. These parameter modifications reorganize the sequence and timing of memory accesses to minimize the total number of accesses required, reducing power consumption without compromising decoding performance.
Solution Approach 2:
The patent enables the decoder to self-optimize its memory access pattern by using pre-calculated layer gap indices that automatically identify which circulants need updating and when. This self-service mechanism eliminates the need for external control logic to manage memory accesses, reducing overhead and power consumption while ensuring decoding completeness.
4Productivity
If faster convergence is achieved, then decoding speed is improved, but power consumption increases
Solution Approach 1:
The patent changes the parameters of the decoding schedule by introducing layer gap indices and optimized circulant update patterns. These parameter modifications reorganize the sequence and timing of memory accesses to minimize the total number of accesses required, reducing power consumption without compromising decoding performance.
Solution Approach 2:
The patent maintains continuous useful action by ensuring that memory accesses are performed in an optimized continuous sequence without unnecessary idle cycles or redundant operations. The pre-calculated update schedules enable the decoder to continuously process circulants efficiently, achieving fast convergence while minimizing power consumption through eliminated wasted operations.
Data Source
AI summary
Systems and methods for decoding low density parity check (LDPC) codes are provided. An input message, representing a codeword encoded using a parity check matrix, is processed and data associated with each of the layers of the parity check matrix is computed. A first layer of the parity check matrix includes a first circulant configured to be updated using the data associated with a second layer of the parity check matrix. A second circulant in the first layer of the parity check matrix, configured to be updated using the data associated with the second layer of the parity check matrix, is identified. The first and second circulants are updated using the data associated with the first and second layers of the parity check matrix.