Layered Oxide Resistive Memory Cell for Fast Forming
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Solution Overview
Problem
Current resistive memory technology faces challenges with slow operation speed and short endurance due to the time-consuming forming process and poor quality of the oxide layer, which is exacerbated by the need for more defects to shorten the process but results in reduced endurance.
Innovation Solution
A non-volatile memory cell with a layered oxide structure comprising a relatively low oxygen content layer adjacent to the bottom electrode, a high oxygen content layer adjacent to the top electrode, and a transition layer with controlled oxygen concentration between them, fabricated using methods like chemical vapor deposition or atomic layer deposition to optimize oxygen concentration and thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a forming process is performed to induce soft breakdown in the oxide layer to increase leakage current, then the element acquires resistive memory characteristics, but the process becomes time-consuming and reduces productivity
Solution Approach 1:
The oxide layer is pre-engineered with controlled oxygen deficiency during fabrication, creating inherent conductive pathways before the forming process. This preliminary structuring reduces the time required for soft breakdown while maintaining reliable resistive memory characteristics.
Solution Approach 2:
The oxygen concentration in the oxide layer is precisely controlled during deposition to create optimal conditions for forming. By adjusting the oxygen partial pressure and deposition parameters, the oxide layer is prepared to undergo faster soft breakdown while still achieving the required resistive switching behavior.
2Productivity
If an oxide layer with more defects is used to shorten the forming process time, then the forming time is reduced, but the quality of the oxide layer deteriorates and endurance decreases
Solution Approach 1:
The oxide layer is engineered with spatially varying oxygen concentrations, creating regions of different quality. The bulk maintains high quality for endurance, while specific regions have controlled oxygen deficiency to facilitate faster forming. This local differentiation allows simultaneous optimization of both forming time and endurance.
Solution Approach 2:
The oxide layer is effectively segmented into regions with different oxygen concentrations. The lower oxygen concentration region near the bottom electrode facilitates faster forming, while the overall layer maintains sufficient quality for good endurance. This segmentation allows independent optimization of forming characteristics and device reliability.
3Speed
If the flash memory technology is scaled to 65 nm generation, then the physical limitation challenge arises, but the operation speed and operation period are also limited
Solution Approach 1:
The resistive memory structure fundamentally changes the operating mechanism from charge trapping (flash memory) to resistance switching. This parameter change in the underlying physics enables faster operation speeds and extended endurance at scaled dimensions, overcoming the physical limitations facing 65 nm flash memory.
Solution Approach 2:
The memory structure uses a composite of metal electrodes and transition metal oxide layer, leveraging the advantageous properties of each material. The transition metal oxide provides robust resistive switching characteristics with fast speed and long endurance, while the metal electrodes ensure good electrical contact and stability, collectively overcoming the limitations of scaled flash memory.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the time and effort required for the forming process while enhancing the endurance of the resistive memory cell by using oxide sub-layers with varying degrees of oxidation, improving both speed and reliability.
Implementation Method 1
The oxide layer comprises a relatively low oxygen content layer adjacent to the bottom electrode, a relatively high oxygen content layer adjacent to the top electrode, and a transition layer disposed between the relatively high and the relatively low oxygen content layers
Implementation Method 2
fabricated using methods like chemical vapor deposition or atomic layer deposition to optimize oxygen concentration and thickness
Implementation Method 3
fabricated using methods like chemical vapor deposition or atomic layer deposition to optimize oxygen concentration and thickness
Data Source
AI summary
A non-volatile memory cell and the fabrication method thereof are provided. The non-volatile memory cell comprises a top electrode, a bottom electrode and an oxide layer disposed between the top electrode and the bottom electrode. The oxide layer comprises a relatively low oxygen content layer adjacent to the bottom electrode, a relatively high oxygen content layer adjacent to the top electrode, and a transition layer disposed between the relatively high and the relatively low oxygen content layers. The transition layer has an oxygen concentration within a range between those of the relatively high and the relatively low oxygen content layers.