Layered Trench Insulation for High-Voltage Semiconductor Edges

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Solution Overview

Problem

Conventional semiconductor devices face challenges in ensuring high-voltage tolerance and adhesion performance of insulation layers, with guard-ring structures being costly and prone to void regions, while trench structures struggle with electric field concentration and moisture penetration.

Innovation Solution

A semiconductor device with a trench disposed in the peripheral region, using a layered insulation structure of first and second insulators with different dielectric constants, enhanced by a protection film, to mitigate electric field concentration and improve adhesion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a single-layer oxide film insulation structure is used, then the manufacturing process is simple, but electric field concentration occurs and adhesion performance is poor

Engineering Contradiction:
Improveinsulation layer fabrication simplicityVSAvoidvoltage tolerance and adhesion performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies composite materials by using a multi-layer insulation structure consisting of a first insulator layer (oxide film with high dielectric constant, e.g., SiO2 with κ=3.9) and a second insulator layer (nitride film with low dielectric constant, e.g., Si3N4 with κ=7.5). This composite structure prevents electric field concentration that occurs in single-layer structures while maintaining manufacturing feasibility. The layered configuration creates a more uniform electric field distribution across the insulation layer.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent applies local quality by assigning different functional characteristics to different layers of the insulation structure. The first insulator layer (oxide) provides high dielectric constant for voltage blocking, while the second insulator layer (nitride) provides low dielectric constant for electric field distribution and good adhesion to packaging materials. Each layer is optimized for its specific function, creating a synergistic effect that resolves the contradiction between manufacturing simplicity and reliability.

Inventive Principle:
Principle #3Local quality

2Reliability

If a guard-ring structure is used to ensure voltage tolerance, then voltage tolerance is improved, but the void region becomes large and production costs increase

Engineering Contradiction:
Improvevoltage toleranceVSAvoidstructure complexity and production cost
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the voltage tolerance function from the traditional guard-ring structure and relocates it to the multi-layer insulation layer itself. By designing the insulation layer with specific dielectric constant gradients and layer configurations, the voltage blocking capability is achieved without requiring additional guard-ring structures. This eliminates the complexity and cost associated with guard-ring fabrication while maintaining voltage tolerance.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The multi-layer insulation structure serves multiple functions simultaneously: it provides voltage tolerance, prevents electric field concentration, ensures good adhesion to packaging materials, and eliminates the need for separate guard-ring structures. This multi-functional design simplifies the overall device structure and reduces production costs while maintaining reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If only silicon oxides are used as insulation layer, then manufacturing is simple, but adhesion performance to packaging resin is poor allowing moisture penetration

Engineering Contradiction:
Improveinsulation layer fabrication simplicityVSAvoidmoisture penetration and adhesion failure
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent uses composite materials by combining oxide insulator layers with nitride insulator layers. The nitride layer (e.g., Si3N4) provides excellent adhesion properties to organic packaging materials while the oxide layer maintains the necessary dielectric properties. This composite approach solves the adhesion problem without significantly complicating the manufacturing process, as both materials can be deposited using standard semiconductor fabrication techniques.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent changes the dielectric constant parameter by introducing a nitride layer with lower dielectric constant (κ=7.5) compared to the oxide layer (κ=3.9 for SiO2). This parameter change not only prevents electric field concentration but also improves adhesion characteristics. The nitride layer's chemical composition and dielectric properties create better interfacial bonding with packaging resins, preventing moisture penetration.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Ensures high-voltage tolerance and prevents moisture penetration, while reducing production costs and enhancing adhesion performance between the insulation layer and packaging material.

Implementation Method 1

an insulation layer disposed to the peripheral region is configured by layering to a first insulator and a second insulator having different relative dielectric constants

Methodology Applied
Scientific EffectDielectric: Dielectric

Data Source

PatentEP4621851A1Semiconductor device
Publication Date: 2025.09.24 SHINDENGEN ELECTRIC MANUFACTURING CO LTD
  • EP4621851A1 patent drawingFigure 1~2
  • EP4621851A1 patent drawingFigure 3~4
  • EP4621851A1 patent drawingFigure 5~6

AI summary

[Object] To provide a semiconductor device for ensuring a high voltage tolerance while enhancing an adhesion performance of an insulation layer. [Means for Solving Problem] A semiconductor device 1 of the present invention is a semiconductor device 1 which has a substrate 10, an epitaxial layer 20 formed to the substrate 10, and insulation layers 40, 50 disposed at the one-face 20a side of epitaxial layer 20, wherein an active layer 60 is disposed to the one-face 20a side of epitaxial layer with intervening the insulation layer 40, and a trench 71 is disposed to a peripheral region 70 formed at an outside region of the active layer 60, and wherein an insulation layer 50 disposed to the peripheral region 70 is configured by layering a first insulator 51 and a second insulator 52.