Layout Checking for Multiple-Patterning Group Assignment

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Solution Overview

Problem

In semiconductor fabrication, multiple-patterning technologies face challenges due to misalignment tolerances and process variations, leading to inconsistent performance across different groups of features, which can result in unpredictable pattern density and mismatch among corresponding features.

Innovation Solution

A method and system that checks the consistency of multiple-patterning group assignment information with predefined constraints, automating the process of assigning layout patterns to ensure predictable performance and reduced mismatch by extracting and verifying group assignments within a layout design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If manual assignment of layout patterns to groups is performed, then flexibility in assigning patterns can be maintained, but time consumption and potential for errors increase

Engineering Contradiction:

Improveflexibility in pattern assignmentVSAvoidtime consumption in assignment process

Core Design Contradiction:

Ease of operationVSLoss of time

Solution Approach 1:

The system automatically extracts group assignment information from the layout design itself without requiring manual input or intervention. The layout design file contains embedded group assignment data that the system retrieves and verifies automatically, eliminating the need for manual assignment operations while maintaining the flexibility of the design process.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The patent replaces manual mechanical assignment operations with an automated computer-based extraction and verification system. The system uses software to automatically retrieve group assignment information from layout design files and check consistency against constraints, substituting manual labor with automated digital processing.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Loss of time

If automated group assignment is implemented, then time consumption is reduced, but complexity of the system increases

Engineering Contradiction:

Improvetime consumption in assignment processVSAvoidsystem complexity in extraction and verification

Core Design Contradiction:

Loss of timeVSDevice complexity

Solution Approach 1:

The system serves multiple functions within a unified framework: it extracts group assignment information, verifies consistency against constraints, and identifies mismatches. This multi-functionality consolidates what would otherwise require separate tools and processes into a single integrated system, reducing overall complexity despite the automated nature of the operations.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces an intermediary verification layer that sits between the layout design and the fabrication process. This intermediary system automatically checks group assignment consistency without requiring direct manipulation of complex layout data, simplifying the interface while maintaining automated verification capabilities.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Device complexity

If group assignment constraints are not verified, then the layout design process remains simple, but manufacturing precision and pattern density consistency deteriorate

Engineering Contradiction:

Improvesimplicity of layout design processVSAvoidpattern density consistency

Core Design Contradiction:

Device complexityVSManufacturing precision

Solution Approach 1:

The system performs preliminary verification of group assignment constraints during the design phase rather than during fabrication. By extracting and verifying group assignment information upfront, the system ensures that the layout design inherently satisfies the constraints needed for consistent pattern density, preventing manufacturing issues before they arise.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism that automatically checks group assignment consistency and provides identification of mismatches. This feedback loop enables the design process to self-correct by highlighting inconsistencies that need resolution, ensuring manufacturing precision is maintained without adding significant complexity to the design workflow.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS9053288B1Layout checking system for multiple-patterning group assignment constraints

Publication Date: 2015.06.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method includes extracting multiple-patterning group assignment information of one or more layout patterns from a layout design. The layout design corresponds to a circuit design, and the one or more layout patterns corresponding to a node of the circuit design. Whether the extracted multiple-patterning group assignment information is consistent with a set of multiple-patterning group assignment constraints of the node is determined by a hardware processor.