Array Substrate Fabrication for LCD Aperture Ratio
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Solution Overview
Problem
The existing array substrate fabrication process for liquid crystal display (LCD) devices results in a reduced aperture ratio due to the significant distance between the data line and the pixel electrode, which affects the brightness and efficiency of the LCD device.
Innovation Solution
A modified fabrication method involving a series of photoresist pattern formations and ashing processes to reduce the width and thickness of the photoresist patterns, allowing for a more precise formation of the data line and semiconductor patterns, thereby minimizing the distance between the data line and the pixel electrode, and enhancing the aperture ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional photoresist pattern formation process is used, then the fabrication process is simple, but the photoresist pattern width and thickness are large, resulting in increased distance between data line and pixel electrode
Solution Approach 1:
The photoresist pattern formation is divided into multiple stages: initial pattern formation, first ashing to reduce width and thickness, second pattern formation, and second ashing. This segmentation allows progressive reduction of photoresist dimensions to minimize the distance between data line and pixel electrode.
Solution Approach 2:
The initial photoresist pattern is formed with larger dimensions to serve as a mask for subsequent etching processes, then systematically reduced through controlled ashing steps. This preliminary over-sizing followed by precise reduction allows better control over final dimensions.
2Illumination intensity
If the photoresist pattern width is reduced to improve aperture ratio, then the aperture ratio and brightness increase, but the fabrication process becomes more complex
Solution Approach 1:
The brightness improvement is achieved through segmented photoresist removal: first ashing reduces the photoresist width and thickness, then second ashing further refines the pattern. This segmented approach allows precise control of the final photoresist dimensions, maximizing the aperture ratio and display brightness.
Solution Approach 2:
The photoresist pattern dimensions (width and thickness) are systematically changed through controlled ashing processes. By adjusting the ashing conditions and performing multiple ashing steps, the photoresist is reduced to optimal dimensions that maximize aperture ratio while maintaining pattern integrity.
3Manufacturing precision
If multiple ashing processes are performed to reduce photoresist width, then the aperture ratio is improved, but the manufacturing time increases
Solution Approach 1:
The photoresist reduction is segmented into two main ashing stages with pattern formation steps in between. This segmentation allows controlled reduction of photoresist dimensions while maintaining process efficiency. The first ashing reduces width and thickness, and the second ashing provides final precision, balancing manufacturing precision with time efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The improved method results in a higher aperture ratio and increased brightness of the LCD device by reducing the protruding width of the semiconductor layers, allowing for a closer proximity of the data line to the pixel electrode.
Implementation Method 1
performing a first ashing process onto the initial PR pattern to partially remove the initial PR pattern so as to form a first ashed PR pattern, the first ashed PR pattern having a smaller width and a smaller thickness than the initial PR pattern
Implementation Method 2
etching the intrinsic amorphous silicon layer and the impurity-doped amorphous silicon layer by a first dry-etching process using the data line as an etching mask to form first and second patterns under the data line
Data Source
AI summary
A method of fabricating an array substrate for a liquid crystal display device includes: forming an initial photoresist (PR) pattern on a metallic material layer; etching the metallic material layer using the initial PR pattern as an etching mask to form the data line and a metallic material pattern, wherein the initial PR pattern is disposed on the data line; performing a first ashing process onto the initial PR pattern to partially remove the initial PR pattern so as to form a first ashed PR pattern, the first ashed PR pattern having a smaller width and a smaller thickness than the initial PR pattern such that end portions of the data line are exposed by the first ashed PR pattern; etching the intrinsic amorphous silicon layer and the impurity-doped amorphous silicon layer by a first dry-etching process; forming a source electrode and a drain electrode on the substrate.