LCD Array Substrate Interlayer Connection via Segmented Metal
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Solution Overview
Problem
In the manufacturing of array substrates for IPS LCDs, the high step height between the gate pad and the second metal layer leads to disconnection of the second metal layer, and the etching process often results in residual layers causing defective contacts due to incomplete etching of the gate insulating layer.
Innovation Solution
The solution involves forming a first metal layer within the contact hole and using additional protective layers to ensure conformal deposition of the second metal layer, reducing the step height and preventing residual layer issues by forming the first metal layer as a connection line between the gate pad and the second metal layer, and employing a double punching process for contact hole formation to remove residual layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a contact hole is formed to electrically connect the gate pad and the second metal layer, then electrical connection is achieved, but the second metal layer becomes disconnected due to large step height
Solution Approach 1:
The patent segments the electrical connection path by introducing a first metal layer between the gate pad and the second metal layer. This division allows each metal layer to be deposited more conformally on its respective contact hole, avoiding disconnection while maintaining reliable electrical connection through the stacked structure
Solution Approach 2:
The first metal layer acts as an intermediary element that bridges the gate pad and the second metal layer. This intermediate layer reduces the step height problem by providing a transitional surface for conformal deposition, ensuring continuous electrical connection without disconnection
2Reliability
If the gate insulating layer is etched to form contact hole, then electrical connection path is created, but residual layers cause defective contact
Solution Approach 1:
The patent applies a preliminary protective layer structure before forming the contact hole. This protective layer is selectively removed to expose the gate pad while protecting other areas, ensuring clean exposure without residual gate insulating layer that would cause defective contact
Data Source
AI summary
An array substrate for a liquid crystal display (LCD) and manufacturing method thereof are provided. The array substrate for a liquid crystal display (LCD) includes: a substrate, including: a gate electrode, a pixel electrode, and a common electrode, a gate pad formed on the substrate, and connected to the gate electrode, a gate insulating layer formed on the gate pad, a first protective layer formed on the gate insulating layer, a second protective layer formed on the first protective layer, a first metal layer formed on the second protective layer, and connected to the gate pad through a first contact hole which exposes the gate pad, a third protective layer formed on the first metal layer and the second protective layer, and a second metal layer formed on the third protective layer, and connected to the first metal layer through a second contact hole which exposes the first metal layer.