LCD Array Substrate Eliminating Through Holes for Higher Transmittance

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Solution Overview

Problem

The existing liquid crystal display (LCD) panels suffer from low transmittance due to the pixel aperture being negatively affected by through holes, which restricts the display quality and view angles.

Innovation Solution

A method for manufacturing an array substrate where a patterned gate layer and common electrodes are arranged simultaneously, followed by a semiconductor layer, source/drain electrode pattern layer, and pixel electrodes/data lines, all covered with a passivation layer, allowing top electrodes to be connected to the common electrode without through holes, thereby eliminating the need for through holes and enhancing transmittance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If through holes are arranged to connect pixel electrodes to source/drain electrodes, then electrical connection is achieved, but pixel aperture ratio and transmittance are reduced

Engineering Contradiction:
Improveelectrical connectionVSAvoidpixel aperture ratio
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from vertical connection (through holes penetrating the pixel electrode) to lateral connection (extending source/drain electrodes along the gate length direction). This dimensional change allows electrical connection without compromising the pixel aperture area, as the connection is made in the plane of the electrode rather than through it.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The source/drain electrode is segmented into multiple portions that extend along the gate length direction, with each portion making contact with the semiconductor layer at different positions. This segmentation enables distributed electrical connection without requiring through holes, thereby maintaining pixel aperture integrity.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If through holes are arranged in pixel electrodes, then connection between layers is enabled, but manufacturing complexity increases

Engineering Contradiction:
Improvelayer connectionVSAvoidthrough hole structure
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent extracts the connection function from the pixel electrode structure by using separate source/drain electrode extensions. This removes the need for through holes in the pixel electrode, simplifying the device structure while maintaining the essential layer-to-layer electrical connection capability.

Inventive Principle:
Principle #2Taking out (Extraction)

3Area of stationary object

If pixel size is reduced to increase aperture ratio, then display resolution improves, but through hole impact becomes more significant

Engineering Contradiction:
Improveaperture ratioVSAvoidthrough hole alignment
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

By changing the connection approach from vertical (through holes) to lateral (electrode extensions along gate length), the patent eliminates the alignment precision requirements for through holes. This allows pixel size to be reduced for higher resolution without the compounding alignment difficulties that would arise from smaller through holes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10345664B2Liquid crystal display panel, array substrate and methods for manufacturing the same
Publication Date: 2019.07.09 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US10345664B2 patent drawing
  • US10345664B2 patent drawing
  • US10345664B2 patent drawing

AI summary

The present invention provides a liquid crystal display panel, array substrate and method for manufacturing the same. The method for manufacturing the array substrate comprises the steps of: arranging simultaneously a patterned gate layer and common electrodes on a substrate; covering a gate insulating layer on the patterned gate layer, the common electrode and the substrate; arranging a semiconductor layer on the gate insulating layer; arranging a source/drain electrode pattern layer on the semiconductor layer, and arranging pixel electrodes and data lines on the gate insulating layer simultaneously; and covering a passivation layer on the source/drain electrode pattern layer, the semiconductor layer, the pixel electrodes and the data lines. The pixel aperture ratio and transmittance can be increased, and achieving a better displaying effect by the present invention.