LCD Composite Data Line Etching for Aperture Ratio
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing methods for fabricating liquid crystal display (LCD) devices result in a semiconductor layer protruding beyond the data line, leading to reduced pixel electrode area and decreased aperture ratio due to the narrower line width of the data line compared to the semiconductor layer, increasing fabrication complexity and cost.
Innovation Solution
A method where the semiconductor layer and data line share the same line width by using a composite etching process, allowing the semiconductor layer to be formed with the same width as the data line, thereby eliminating protrusion and optimizing pixel electrode area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the semiconductor layer is formed with a larger line width than the data line, then the pixel electrode area is increased, but the semiconductor layer protrudes beyond the data line causing parasitic capacitance issues
Solution Approach 1:
The patent applies local quality by creating different line width relationships in different regions: in the pixel region, the semiconductor layer has a larger line width than the data line to maximize pixel electrode area, while in the data line region, the line widths are substantially equal to eliminate parasitic capacitance. This spatial variation in geometric relationships resolves the contradiction between maximizing area and minimizing harmful capacitance.
2Ease of manufacture
If the data line line width is made smaller than the semiconductor layer line width, then the fabrication process is simplified, but the pixel electrode area is decreased due to the need to maintain distance from the data line
Solution Approach 1:
The patent implements local quality by varying the line width relationship between data line and semiconductor layer across different regions. In the pixel region, the semiconductor layer extends beyond the data line to maximize pixel area, while in the data line region, the widths are equal to simplify fabrication. This regional differentiation allows the patent to achieve both simplified manufacturing and maximized pixel area.
3Productivity
If the semiconductor layer and data line have different line widths, then one mask process can form both patterns, but the fabrication cost increases due to additional mask processes
Solution Approach 1:
The patent applies merging by combining the patterning of the semiconductor layer and data line into a single mask process in the data line region, where both features have substantially equal line widths. This integration reduces the number of mask processes and associated costs, while maintaining the ability to achieve the desired geometric relationships through regional variation.
Data Source
AI summary
An LCD device includes plurality of gate lines and data lines crossing each other to define pixel regions on a substrate. A thin film transistor (TFT) resides at a crossing portion of the gate lines and the data lines and a pixel electrode is electrically connected with the TFT. The TFT includes a gate electrode, a gate insulation layer on the gate electrode and a semiconductor layer on the gate insulation layer. A portion of the data line and the semiconductor layer form a composite layer between adjacent pixel electrodes in which a line width of data line is the same as a line width of semiconductor layer. A method of fabricating the LCD device includes etching a passivation layer using a mask pattern and etching the semiconductor layer using the mask pattern and a portion of the data line as an etch mask to form the composite layer.


