Solid-State Devices TRIZ Cases

Electrostatic spraying deposits charged liquid emission layer materials onto sub-pixel regions through a nozzle unit.

A functional layer integrates coils and sensing loops to detect electromagnetic pen signals within the display panel structure.

A pixel defining layer aligns with a conductive layer to manage light interference in a display transmissive area.

A multi-bonded memory module uses control circuitry to execute parallel read and write operations across separate semiconductor dies.

Stacking photodiodes vertically over readout circuitry minimizes dark current generation while maintaining high pixel density and image sensitivity.

A MONOS trapping film edge protection method uses thermal oxidation to form insulating oxide films on diffused layer upper portions.

Segmented laser beams and dynamic width adjustment ensure uniform crystallization across large display substrates.

A FinFET fabrication method implants impurities into a punch-through stopper to induce current leakage paths for electrostatic discharge protection.

Differing bank inclination angles compensate for asymmetric ink drying to ensure uniform functional layer thickness and improve light emission efficiency.

A CMOS image sensor photo diode uses a highly doped p-type SiGeC epitaxial layer to enhance signal detection.

Zigzag metal wirings minimize parasitic resistance in grid transistors, maintaining low on-resistance for efficient circuit downsizing.

Insulative materials laterally surround confined phase change structures to reduce thermal disturbance and programming current in memory arrays.

A three-dimensional cross-point architecture with vertical bit lines eliminates diodes, reducing leakage currents and manufacturing complexity.

Metal connection lines between test pads and driving circuits disperse static electricity, protecting active matrix arrays from dielectric breakdown.

Cold weld bonding joins inorganic semiconductor layers to curved substrates, enabling high-density photodetector arrays without fabrication breaks.

A foldable flexible substrate display assembly integrates multiple screen sections to expand the viewing area while maintaining a compact form factor.

Gradient anode layers counteract solvent migration to eliminate the coffee-ring effect and ensure uniform film topography.

Intermediate layers with assist dopants balance carrier transport in organic electroluminescent devices.

Turnaround diode series connects input and output terminals to reduce electrostatic discharge damage.

Applying fringe voltage to a conductive layer pattern generates an electric field that raises the floating gate potential for data programming.

An L-shaped spring connects a MEMS isolation platform to a frame, providing vibrational attenuation in x, y, and z directions.

Spacer patterning creates sub-lithographic charge storage elements, bypassing photolithography resolution limits to boost device packing density.

Replacing photolithography with self-assembling porous coordination polymers reduces manufacturing complexity and cost.

A touchscreen design integrates sensor wiring with lower-layer conductive films through an inorganic film joining portion located in the picture-frame area.

Lowering the non-operation gate height prevents ion implantation overlap, suppresses Gate Induced Drain Leakage, and improves refresh characteristics.

Four laterally isolated active zones within a substrate enable flexible programming and secure data storage by embedding logic values in internal structures.

Segmenting the substrate into layers with different doping types controls diffusion accuracy, enabling high-voltage ESD protection without signal distortion.

Segmented collection electrodes covering scan lines suppress charge trapping and residual images in the semiconductor layer.

Segmented planarizing films prevent anomalous discharge from residual metal by ensuring complete photolithography exposure at cutting edges.

Vertical stacking via through-silicon vias reduces package thickness while increasing circuit density.

A semi-vase-shaped lens directs light beams through reflective and diffractive surfaces to achieve a convergent angle.

A color filter substrate embeds patterns inside transparent cavities to reduce light scattering and reflection.

A solid-state image sensor uses a first material film to fill concave portions on a protective substrate.

Segmented organic layers adjust carrier balance to suppress interfacial chemical reactions that degrade element reliability.

A single gray scale mask defines contact holes and pixel electrodes, reducing the five-mask process to one step.

Segmented passivation and ion implantation regions improve blue light transmittance while reducing dark current in image sensors.

Photosensitive device on package substrate generates optical signals for object recognition without parasitic capacitance degrading display effect.

Silicon passivation on germanium-on-insulator lateral bipolar transistors reduces interface defects to enhance current gain and power efficiency.

A semiconductor package with a molding cavity creates a hollow space for enhanced heat dissipation.

A buffer strip featuring an uneven three-dimensional surface confines organic layers within OLED encapsulation structures.

Vertical stacking of amorphous silicon resistive switching materials reduces metallization steps and feature size while maintaining CMOS compatibility.

Laser irradiation with varying scanning speeds forms distinct crystalline silicon grain structures within a single thin-film device process.

A multi-gate high electron mobility transistor protection clamp provides bidirectional conduction paths for compound semiconductor circuitry.

A capacitor electrode uses nested hollow and non-hollow cylindrical portions to increase capacitance.

A microlens array uses alternating hydrophilic and hydrophobic materials to form distinct lens shapes via thermal reflow.

A NOR-type hybrid memory cell combines charge storage and variable resistance nodes to increase data density.

Sloped formation layer edges at 45 to 60 degrees prevent delamination caused by thermal deformation in LED packages.

Sequential etching with varying depths creates stepped structures in 3D semiconductors, reducing photolithography steps and lowering fabrication complexity.

A composite etching process forms a semiconductor layer with the same line width as the data line to maximize pixel electrode area.

Interchangeable lens, aperture, and filter elements on a universal carrier reduce manufacturing complexity by enabling flexible optical property configuration.

Minute holes in an optical refractive layer redirect emitted light to improve background visibility while maintaining display resolution.

A transparent holding part guides resin flow for uniform phosphor encapsulation, preventing oxidation of the LED chip.

Germanium or tellurium dopants replace silicon in Group III nitride layers, reducing lattice strain and allowing thicker transition layers without cracking.

Ion implantation modifies the dielectric layer refractive index to focus light, resolving low-light detection limits without adding structural complexity.

A multi-layer optical filter uses tilted retardation films and a linear polarizer to control light polarization.

Minimizing the N-well area and using grounded P-taps prevents radiation-induced single event upsets by sinking minority carriers away from memory nodes.

Asymmetric conductive line widths in a display panel reduce white angular dependency by modulating light shielding efficiency across azimuth angles.

Encapsulating printed light-emitting diodes within a thermoplastic film via injection molding prevents thermal destruction of sensitive electronic components.

Modified shallow trench isolation boundary reduces power consumption by suppressing leakage current in sub-40 nm semiconductor devices.

Segmented fluorescent layers optimize red and green light conversion while improving heat dissipation and reducing unwanted green light consumption.

Active groups on a silane coating react with an adhesive layer to prevent peeling during OLED encapsulation.

A buffering member with graded density absorbs external impacts on an OLED display panel, protecting the sealing member from tensile stress damage.

Doping phase change materials with aluminum, zirconium, hafnium, or silicon minimizes volume changes and electromigration in 3D cross-point memory cells.

A memory device executes erase sub-operations on subsequent blocks during program operations on current blocks.

Full annulation around the boron atom improves thermal stability and emission efficiency for display devices.

A liquid crystal display array substrate uses a two-dimensional common electrode grid to lower pixel resistance and stabilize voltage.

Thiosulfate-containing polymers cure into dielectric layers at low temperatures, enabling flexible substrate compatibility without high-heat damage.

A light blocking portion integrated into pixel defining layers shields oxide thin-film transistors from organic layer emission.

A blue thermally-activated delayed fluorescent layer converts triplet excitons to singlet excitons within an organic light-emitting device.

Holes in an inorganic film expose underlying organic patterns that discharge outgas, preventing film peeling during high-temperature vapor deposition.

Oblique ion implantation creates self-aligned P-wells in trench MOSFETs, bypassing lithography limits to reduce cell pitch and eliminate extra masking steps.

Via holes in the encapsulation layer route touch and display wires to a shared bonding area, reducing thickness and simplifying connections.

Ultraviolet irradiation removes surface adsorbates from the tungsten oxide hole injection layer, reducing drive voltage and extending device longevity.

A vertical semiconductor manufacturing method segments contact hole formation into edge and center portions using distinct photoresist patterns to achieve precise depth control.

A magnetoresistive random access memory device uses diagonal active patterns to enhance integration density.

Asymmetric electrode placement on optical element main surfaces enables flip chip bonding while minimizing radiated noise in high-frequency signal transmission.

A buffer unit between OLED substrates absorbs residual stress during manufacturing.

Side surface electrodes on a mesa structure reduce contact resistance, enabling high breakdown voltage and low on-state resistance in GaN-based HEMTs.

Segmented connection portions reduce common hole depth to prevent PI solution diffusion issues and panel stains in array substrates.

Applying conversion layers to thinned semiconductor wafers before singulation eliminates individual chip handling and reduces manufacturing costs.

Integrating blue and green emitters on a conductive submount substrate eliminates fluorescent conversion losses while improving color rendering.

Dual microlens arrays redirect and converge LED light while a light absorbing layer reduces external reflection, improving bright room contrast.

A translucent layer with intermediate refractive index improves LED package color uniformity.

A vertical transistor phase change memory structure employs a self-aligned cell contact to define the current path cross-sectional area.

Sloped TiSiN heater sidewalls prevent void formation during high aspect ratio gap-fill, maintaining device reliability.

Independent drive circuitry controls stacked phosphorescent emitters in inverted tandem OLEDs, eliminating color shift at gray levels.

Positioning gate electrodes below damaged insulating regions suppresses short-circuit defects during semiconductor device operations.

Rigid organometallic compounds enable deep blue emission while resolving trade-offs between color purity and luminescence stability.

A compact optical sensor chip device integrates microcontrollers and wake-up sensors on a substrate featuring through-platings for precise mechanical positioning.

Paraboloid optics redirect LED light sideways to resolve normal emission limits while maintaining simple packaging.

Rotating the droplet discharge head aligns nozzles with varied pixel orientations, resolving thickness unevenness in color filter manufacturing.

A high Z material layer shields signal electronics from unconverted X-rays, reducing noise and design complexity.

Segmented vertical pillar structure suppresses sneak current while simplifying film formation for higher yield.

Low-temperature induction heating resolves the contradiction between surface hardness and shape accuracy by preventing tooth tip melting during quenching.

A third electrode enables non-destructive testing of encapsulation layer integrity in organic optoelectronic components.

Optimized emission layer peak wavelengths enhance color viewing angle characteristics in organic light emitting display devices.

Segmented active layers resolve the contradiction between broad wavelength coverage and component quantity, eliminating the need for separate LEDs.

A transparent spacer aligns display substrates within an open hole to maintain a stable cell gap.

Vertical stacking of ferroelectric field-effect transistors resolves low cell density and non-uniform series resistance in conventional two-dimensional arrays.