Vertical Semiconductor Contact Hole Depth Control via Segmentation
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Solution Overview
Problem
Current methods for manufacturing vertical type semiconductor devices with integrated wirings are complex and prone to process dispersion, leading to increased manufacturing costs and potential operation and reliability defects.
Innovation Solution
A method involving the formation of cell circuit patterns and insulating interlayers on a substrate, with a reflection limiting layer and photoresist pattern to create contact holes of decreasing depths, followed by the deposition of conductive material to form contacts, simplifying the process and reducing the need for additional photolithography steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple photolithography processes and etching processes are used to form integrated wirings, then contact holes can be formed at different depths, but the manufacturing process becomes complex and prone to process dispersion
Solution Approach 1:
The patent segments the contact hole formation process by spatial location rather than by depth. It divides contact holes into edge portion contact holes and center portion contact holes, applying different formation methods to each segment. Edge contact holes are formed using a first photolithography process with a first photoresist pattern, while center contact holes are formed using a second photolithography process with a second photoresist pattern, thereby simplifying the overall process while achieving precise depth control.
Solution Approach 2:
The patent applies local quality by using different photoresist patterns for different spatial regions. The first photoresist pattern is used specifically for edge portion contact holes where precise depth control is critical, while the second photoresist pattern is used for center portion contact holes. This localized approach optimizes the manufacturing process for each region's specific requirements without unnecessarily complicating the entire process.
2Manufacturing precision
If multiple photolithography processes are used to form integrated wirings, then contact holes at different depths can be achieved, but manufacturing costs increase
Solution Approach 1:
The patent segments the photolithography process into two distinct stages: a first photolithography process for forming edge portion contact holes with precise depth control, and a second photolithography process for forming center portion contact holes. This segmentation allows each process to be optimized independently, reducing the need for multiple iterative adjustments and thereby lowering overall manufacturing costs while maintaining precision where required.
Solution Approach 2:
The patent applies partial action by using the first photolithography process only for edge portion contact holes where precise depth control is necessary, rather than applying it to all contact holes. The second photolithography process is used for center portion contact holes where less precise depth control is acceptable. This partial application of the more complex process reduces manufacturing costs while maintaining necessary precision.
3Manufacturing precision
If multiple photolithography processes are used to form integrated wirings, then contact holes can be formed with different depths, but the occurrence of operation and reliability defects increases
Solution Approach 1:
The patent segments the contact hole formation into edge and center portions with different photolithography processes. Edge portion contact holes, which are more critical for device reliability, are formed with the first photolithography process that provides better depth control. Center portion contact holes are formed with the second process. This segmentation ensures that critical areas receive enhanced process control, thereby improving overall device reliability.
Solution Approach 2:
The patent applies local quality by providing different photoresist pattern quality levels for different regions. The first photoresist pattern for edge contact holes is formed with higher precision requirements, while the second photoresist pattern for center contact holes has relaxed requirements. This localized quality differentiation ensures that reliability-critical areas receive superior process control without unnecessarily increasing complexity in non-critical areas.
Data Source
AI summary
According to example embodiments of inventive concepts, a method includes forming cell patterns and insulating interlayers between the cell patterns on the substrate. An upper insulating interlayer including initial and preliminary contact holes is formed on an uppermost cell pattern. A first reflection limiting layer pattern and a first photoresist layer pattern are formed for exposing a first preliminary contact hole while covering inlet portion of the initial and preliminary contact holes. A first etching process is performed on layers under the first preliminary contact hole to expose the cell pattern at a lower position than a bottom of the first preliminary contact hole. A partial removing process of sidewall portions of the first reflection limiting layer pattern and the first photoresist layer pattern and an etching process on exposed layers through bottom portions of the preliminary contact holes are repeated for forming contact holes having different depths.