Wafer-Level Conversion Layer Application for LED Manufacturing

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Solution Overview

Problem

The existing methods for producing optoelectronic conversion semiconductor chips are elaborate and cost-intensive, requiring individual handling and relocation of semiconductor chips for applying a conversion layer.

Innovation Solution

A method involving a growth substrate, semiconductor layer sequence, electric contacts, thinning, and application of a conversion layer on the thinned substrate, followed by singulation to produce multiple optoelectronic conversion semiconductor chips, which eliminates the need for additional electrical connections and simplifies the production process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If individual semiconductor chips are gripped and relocated for applying conversion layer, then conversion layer can be applied on each chip, but the production process becomes elaborate and cost-intensive

Engineering Contradiction:
Improveproduction process simplicityVSAvoidmanufacturing efficiency
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent merges multiple production steps by applying the conversion layer to the entire semiconductor wafer before singulation, rather than to individual chips. This combines the wafer-level processing with conversion layer application, eliminating the need for individual chip handling and relocation, thereby simplifying the manufacturing process while maintaining high productivity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The conversion layer is applied in advance to the complete semiconductor wafer before the chips are separated through singulation. This preliminary action allows all subsequent processing to be done at the wafer level, avoiding repeated individual chip manipulation and reducing manufacturing complexity and cost

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If conversion layer is applied on completely-processed semiconductor chips, then each chip can be individually coated, but additional electrical connections are required

Engineering Contradiction:
Improvecoating process simplicityVSAvoidelectrical connection requirements
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The conversion layer is applied to the semiconductor wafer before singulation and before the chips are mounted on their final carriers. This timing of the preliminary action ensures that the electrical contacts are already in place on the wafer, and the conversion layer application does not interfere with subsequent electrical connections, eliminating the need for additional bonding wires or connections

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of applying the conversion layer after the chips are individually processed and mounted, the patent inverts the sequence by applying the conversion layer to the wafer-level structure before separation and final mounting. This reversed sequence eliminates the need for additional electrical connections that would be required if the conversion layer were applied after individual chip processing

Inventive Principle:
Principle #13The other way round (Inversion)

3Productivity

If multiple chips are produced on a wafer composite, then production efficiency increases, but individual chip handling becomes necessary

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidchip relocation process
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The conversion layer is applied to the entire wafer containing multiple chips before they are separated. This preliminary action at the wafer level allows all chips to be processed simultaneously, maintaining high productivity while avoiding the need for individual chip handling during the conversion layer application process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent merges the conversion layer application process with the wafer-level processing, treating all chips on the wafer as a single processing unit. This merging eliminates the need for individual chip relocation and handling, maintaining manufacturing efficiency while reducing process complexity

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the cost-efficient production of optoelectronic conversion semiconductor chips, such as LEDs, by integrating the conversion layer directly onto the substrate during processing, reducing the need for individual chip placement and enhancing manufacturing efficiency.

Implementation Method 1

The conversion semiconductor chip in particular is a light-emitting diode, LED for short. Now, the semiconductor chip is preferably configured to emit blue light or white light.

Methodology Applied
Scientific EffectLight-emitting diode (LED) effect: Light Emitting Diode

Implementation Method 2

In particular, the conversion layer is configured to convert the radiation emitted by the semiconductor chip into white light, in particular radiation emitted by the semiconductor chip of the blue range.

Methodology Applied
Scientific EffectPhotoluminescence: Photoluminescence

Implementation Method 3

Thinning can be carried out by grinding and/or plasma processes.

Methodology Applied
Scientific EffectPlasma etching: Plasma

Data Source

PatentUS10424698B2Method for producing optoelectronic conversion semiconductor chips and composite of conversion semiconductor chips
Publication Date: 2019.09.24 OSRAM OLED
  • US10424698B2 patent drawing
  • US10424698B2 patent drawing
  • US10424698B2 patent drawing

AI summary

A method for producing optoelectronic conversion semiconductor chips and a composite of conversion semiconductor chips are disclosed. In an embodiment the method includes growing a semiconductor layer sequence on a growth substrate, applying an electric contact on to a rear side of the semiconductor layer sequence facing away from the growth substrate, thinning the growth substrate, after thinning, cutting the growth substrate at least to the semiconductor layer sequence thereby forming a first intermediate space, applying a conversion layer on to the thinned growth substrate and singulating at least the thinned growth substrate and the semiconductor layer sequence.