Power Supply Circuit Synchronization for LCD Voltage Stability
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Solution Overview
Problem
Conventional liquid crystal display systems face challenges in maintaining image quality while reducing power dissipation, as lowering the operating frequency to achieve lower current consumption leads to degraded image quality and instability in the supply power voltage.
Innovation Solution
A power supply circuit that generates synchronized frame, line selection, and boost operation reference clock signals, with a boost circuit performing charging and discharging operations in synchronization with these signals to provide a stable power supply voltage to the driver circuit, ensuring consistent boosted voltage across frames and lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the operating frequency is lowered to reduce current consumption, then power dissipation is reduced, but image quality and supply power voltage stability are degraded
Solution Approach 1:
The patent applies periodic action by synchronizing the boost circuit's charging and discharging operations with the frame synchronization signal. The boost circuit performs periodic boost operations at specific timings within each frame period, ensuring that power is supplied in a rhythmic, synchronized manner that maintains voltage stability even at lower operating frequencies. This periodic synchronization prevents the voltage instability that would otherwise occur when reducing operating frequency for lower power consumption.
Solution Approach 2:
The patent implements feedback by using the frame synchronization signal as a reference to control the boost circuit's operation timing. The boost circuit receives the frame synchronization signal and adjusts its charging and discharging operations based on this reference signal, creating a closed-loop control system that ensures the boosted voltage is supplied at the correct timings. This feedback mechanism maintains reliable image quality and voltage stability while allowing lower power dissipation.
2Use of energy by moving object
If the operating frequency is lowered to achieve lower current consumption, then power consumption is reduced, but supply power voltage becomes unstable
Solution Approach 1:
The boost circuit performs periodic charging and discharging operations synchronized with the frame synchronization signal. By timing these periodic operations to occur at specific points within each frame period, the circuit maintains steady voltage levels even when operating at lower frequencies for reduced current consumption. The periodic nature of the boost operations ensures that voltage is replenished and stabilized rhythmically throughout each frame.
Solution Approach 2:
The patent changes the timing parameters of the boost circuit operations by synchronizing them with the frame synchronization signal rather than using a fixed high-frequency operation. This parameter change allows the circuit to operate at lower frequencies while maintaining voltage stability through precise timing control. The charging and discharging timings are adjusted based on the frame synchronization signal, enabling stable voltage output at reduced power consumption levels.
3Loss of energy
If the operating frequency is lowered to reduce power dissipation, then energy consumption is reduced, but image quality is degraded
Solution Approach 1:
The boost circuit executes periodic charging and discharging operations that are synchronized with the frame synchronization signal. This periodic operation ensures that the driver circuit receives stable boosted voltage at the correct timings for each frame and line, maintaining high image quality. By aligning the boost operations with the display timing, the circuit can operate at lower frequencies for reduced power dissipation without compromising the precision required for quality image display.
Solution Approach 2:
The frame synchronization signal serves as a feedback reference that controls the boost circuit's operation timing. This feedback mechanism ensures that the boosted voltage is supplied at the precise moments needed for high-quality image display, even when operating at lower frequencies. The synchronization with the frame signal creates a closed-loop control that maintains image quality standards while enabling lower power dissipation through reduced operating frequency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances image quality by synchronizing the power supply circuit with the frame signal, allowing for lower power dissipation without degrading the image quality, achieving both lower power consumption and higher image quality.
Implementation Method 1
a charging capacitor C1 having one terminal thereof connected to the other terminal of the switch S1, a smoothing capacitor C2 connected between the output terminal DCDCout and the ground GND
Data Source
AI summary
Disclosed is a device which includes an oscillation circuit for generating a reference clock signal CLK (osc), a display counter circuit for generating from the reference clock, a frame synchronization signal CLK (frm), a line selection reference clock signal CLK (drv), and a boost operation reference clock obtained on performing frequency multiplication of the line selection reference clock signal CLK (drv), a frequency divider circuit for inputting the frame synchronization signal CLK (frm) as a reset signal thereof and performing frequency division of the boost operation reference clock to output a boost operation clock signal CLK (dcdc), a boost circuit for performing charging and discharging operations according to the boost operation clock signal CLK (dcdc), and a driver circuit supplied with the boosted voltage of the boost circuit for driving a scan line selected the line selection reference clock signal CLK (drv).