Liquid Crystal Display Semiconductor Pattern Layer Diffusion Prevention
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Solution Overview
Problem
The manufacturing process of liquid crystal display devices is time-consuming and costly due to the multiple steps involved in the masking process, which affects the performance and efficiency of the devices.
Innovation Solution
A liquid crystal display device design that includes a semiconductor pattern layer with a diffusion prevention pattern and an ohmic contact layer containing phosphorus, where the ohmic contact layer is etched to form a channel unit, reducing the need for complex masking processes and improving production efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a masking process is used to pattern films, then manufacturing precision is improved, but productivity deteriorates due to multiple time-consuming steps
Solution Approach 1:
The patent extracts and eliminates the masking process from the manufacturing flow by using a self-aligned patterning method where the semiconductor pattern layer itself defines the alignment reference for subsequent electrode formation, removing the need for separate masking steps while maintaining patterning precision
Solution Approach 2:
The semiconductor pattern layer is formed first to serve as a pre-established alignment reference that automatically guides the positioning of diffusion prevention patterns and electrodes, eliminating the need for subsequent masking operations and reducing process steps
2Reliability
If multiple masking steps are performed, then device performance is improved, but loss of time increases due to extended processing duration
Solution Approach 1:
The patent merges the alignment reference function and the structural layer function into a single semiconductor pattern layer that serves both purposes, allowing multiple patterning operations to be performed without separate masking steps, thereby reducing processing time while maintaining device performance
Solution Approach 2:
The semiconductor pattern layer is designed to serve multiple functions simultaneously: as an active device layer, as an alignment reference for diffusion prevention patterns, and as a template for electrode positioning, eliminating the need for dedicated masking layers and reducing overall processing time
3Reliability
If phosphorus is added to the ohmic contact layer, then electrical conductivity is improved, but harmful diffusion into the semiconductor layer occurs
Solution Approach 1:
The patent introduces a diffusion prevention pattern as an intermediary barrier layer positioned between the phosphorus-doped ohmic contact layer and the semiconductor pattern layer, which blocks phosphorus diffusion while allowing the electrical benefits of phosphorus doping to be realized in the contact layer
Solution Approach 2:
The patent segments the structure by inserting a diffusion prevention pattern that divides the ohmic contact layer from the semiconductor pattern layer, creating distinct functional zones where phosphorus can be concentrated in the contact layer for conductivity enhancement without contaminating the semiconductor layer
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a liquid crystal display device with excellent electrical characteristics and improved production efficiency by simplifying the manufacturing process and preventing phosphorus diffusion into the semiconductor pattern layer.
Implementation Method 1
The ohmic contact layer may contain a phosphorus (P) atom. The concentration of the phosphorus (P) atom may be 1.74E+21/cm3 or more.
Implementation Method 2
a diffusion prevention pattern disposed on the semiconductor pattern layer
Data Source
AI summary
Provided are liquid crystal display and the method for manufacturing the same. According to an aspect of the present invention, there is provided a liquid crystal display device, including a first substrate; a gate electrode disposed on the first substrate; a semiconductor pattern layer disposed on the gate electrode; and a source electrode and a drain electrode disposed on the semiconductor pattern layer and facing each other, wherein a diffusion prevention pattern is disposed on the semiconductor pattern layer to prevent diffusion into the semiconductor pattern layer or to maintain uniform thickness of the semiconductor pattern layer.