LCD Panel Wiring Layout for Low Parasitic Capacitance
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Solution Overview
Problem
Current liquid crystal display panels face challenges in suppressing parasitic capacitance between wiring and pixels while maintaining a high aperture ratio, which is essential for achieving higher definition and efficient light transmission in display devices.
Innovation Solution
The liquid crystal display panel design includes a first substrate with pixel electrodes, thin-film transistors, and metal wiring lines that are insulated and arranged in a specific configuration to minimize parasitic capacitance, featuring extending portions and a transparent common electrode to optimize the layout and reduce electric field density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the definition of the display area is increased, then the display resolution is improved, but the aperture ratio is reduced due to increased wiring occupation
Solution Approach 1:
The patent transitions from planar wiring arrangement to three-dimensional wiring structure by extending metal wiring lines in the thickness direction (Z-direction) to cross the semiconductor layer. This vertical extension allows wiring to occupy less area in the pixel plane while maintaining electrical connectivity, thereby improving aperture ratio without sacrificing display resolution.
2Object-generated harmful factors
If light-shielding metal is added to minimize parasitic capacitance, then the parasitic capacitance between data wiring and pixel electrode is reduced, but the aperture ratio is limited
Solution Approach 1:
Instead of using planar light-shielding metal layers that occupy pixel area, the patent uses vertically extended metal wiring lines that cross the semiconductor layer in the thickness direction. This three-dimensional configuration provides parasitic capacitance suppression functionality while minimizing occupation of the pixel plane area, thus maintaining high aperture ratio.
3Area of stationary object
If the line width of the black matrix layer is reduced to improve aperture ratio, then the aperture ratio is improved, but the parasitic capacitance suppression capability is compromised
Solution Approach 1:
The patent replaces the two-dimensional black matrix layer with vertically extended metal wiring lines that cross the semiconductor layer. This vertical extension into the third dimension provides effective parasitic capacitance suppression through increased separation distance between conductive elements, while the horizontal footprint remains minimal, preserving high aperture ratio.
4Measurement precision
If more wiring lines are arranged to support higher definition, then the display resolution is improved, but the space for arranging wiring increases leading to reduced aperture ratio
Solution Approach 1:
The patent utilizes the thickness direction (Z-direction) to arrange wiring lines vertically, allowing multiple wiring layers to cross the semiconductor layer at different heights. This three-dimensional wiring arrangement accommodates more wiring lines for high-definition displays without increasing the horizontal occupation area in the pixel plane, thereby maintaining high aperture ratio.
Data Source
AI summary
According to an aspect, a liquid crystal display panel includes an extending portion. The extending portion is metal wiring provided on the same plane as a plane parallel to a surface of a TFT substrate on which a scan line extends in the X-direction, and is electrically conductive metal extending from the scan line. The extending portion partially overlaps a space, but does not overlap an opening area, in the Z-direction.