LDFET Backside Contact Layout for High-Current Package Routing
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Solution Overview
Problem
High power semiconductor applications face limitations in circuit design flexibility and manufacturability due to the physical constraints of large high-performance electrical connections on the front-side of semiconductor dies, particularly in integrated lateral diffusion field effect transistor (LDFET) circuits, where the number of required front-side connections is high and space is limited.
Innovation Solution
The use of electrically conductive clips connected to both front-side and backside contacts of semiconductor dies, reducing the number of front-side connections needed by utilizing a substrate contact as a backside connection, thereby increasing available space for high-performance connections and improving circuit design and manufacturability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple front-side electrical connections are used for high current capacity, then current carrying capacity is improved, but device area is increased
Solution Approach 1:
The patent utilizes the backside of the semiconductor die as a third dimension for electrical connections. By forming contact holes through the substrate and creating backside contact regions, the device achieves additional current paths without occupying more front-side area, effectively resolving the contradiction between current carrying capacity and device area.
2Quantity of substance
If multiple front-side electrical connections are used for high current capacity, then current carrying capacity is improved, but manufacturing complexity is increased
Solution Approach 1:
The patent segments the electrical connection paths by separating front-side contacts from backside contacts. This segmentation allows independent optimization of each connection type and simplifies the manufacturing process by enabling separate formation steps for front-side and backside connections, reducing overall manufacturing complexity while maintaining high current capacity.
3Quantity of substance
If electrically conductive clips are used for front-side connections, then current carrying capacity is improved, but mechanical positioning accuracy is reduced
Solution Approach 1:
By moving some electrical connections to the backside of the device, the patent reduces the number of front-side connections that require high-precision mechanical positioning. The backside contacts can be formed with less stringent positioning requirements, thereby maintaining current carrying capacity while improving manufacturing precision.
Data Source
AI summary
A semiconductor package includes a leadframe having an electrically conductive paddle, electrically conductive perimeter package leads, a first electrically conductive clip electrically connected to a first set of the package leads, and a second electrically conductive clip electrically connected to a second set of the package leads. The semiconductor package includes a single semiconductor die. The die includes a front-side active layer having an integrated power structure of two or more transistors. The die includes a backside portion having a backside contact electrically coupled to at least one of the two or more transistors and to the paddle. One or more first front-side contacts of the die are electrically coupled to at least one of the transistors and to the first clip, and one or more second front-side contacts of the die are electrically coupled to at least one of the transistors and to the second clip.