LDMOS Transistor Charge Balanced Structure
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Solution Overview
Problem
Existing laterally diffused MOS transistors (LDMOS) face challenges in achieving improved device performance in terms of on-resistance (Rds,on) and Gate-to-Drain capacitance (Cgd) while maintaining manufacturability, particularly in high-frequency applications where breakdown voltage and power loss are critical.
Innovation Solution
The design incorporates a substrate with a lightly doped epitaxial layer, source and drain regions, and a conductive gate that partially overlaps these regions, along with a drain contact trench and a highly doped region, optimizing the breakdown voltage and reducing parasitic capacitance through a specific doping profile and structure configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thick epitaxial layers are used to achieve high breakdown voltage (>60V), then breakdown voltage is improved, but on-resistance (Rds,on) increases
Solution Approach 1:
The patent changes the doping parameters of the epitaxial layer, specifically using a lightly doped epitaxial layer with optimized doping concentration to achieve both high breakdown voltage and low on-resistance. This parameter optimization allows the device to break down at higher voltages while maintaining low resistive losses during conduction.
Solution Approach 2:
The patent introduces a highly doped region localized at the drain contact area, creating a non-uniform doping profile. This local high doping concentration reduces the on-resistance at the contact interface without affecting the overall breakdown voltage characteristics determined by the lightly doped epitaxial bulk.
2Object-affected harmful factors
If drain region extends vertically through epitaxial layer to reduce specific on-resistance, then on-resistance is reduced, but breakdown voltage becomes highly dependent on drain region location
Solution Approach 1:
The patent creates a localized highly doped region at the drain contact area rather than extending the drain vertically through the entire epitaxial layer. This localized doping approach reduces specific on-resistance at the contact interface while maintaining the lightly doped epitaxial bulk, thereby decoupling the breakdown voltage from drain region location variations.
Solution Approach 2:
The patent segments the drain structure into two functional parts: a lightly doped epitaxial region that determines breakdown voltage and a highly doped contact region that reduces on-resistance. This segmentation allows independent optimization of each region's properties without mutual interference.
3Reliability
If conventional LDMOS structure is used to achieve high breakdown voltage, then breakdown voltage is improved, but Gate-to-Drain capacitance (Cgd) remains high
Solution Approach 1:
The patent optimizes the doping concentration parameter of the epitaxial layer, using a lightly doped configuration that reduces the electric field strength and consequently lowers the Gate-to-Drain capacitance while maintaining the required breakdown voltage through proper layer thickness and doping profile design.
Data Source
AI summary
A laterally diffused metal-oxide-semiconductor transistor device includes a substrate having a first conductivity type with a semiconductor layer formed over the substrate. A source region and a drain extension region of the first conductivity type are formed in the semiconductor layer. A body region of a second conductivity type is formed in the semiconductor layer. A conductive gate is formed over a gate dielectric layer that is formed over a channel region. A drain contact electrically connects the drain extension region to the substrate and is laterally spaced from the channel region. The drain contact includes a highly-doped drain contact region formed between the substrate and the drain extension region in the semiconductor layer, wherein a topmost portion of the highly-doped drain contact region is spaced from the upper surface of the semiconductor layer. A source contact electrically connects the source region to the body region.


