LDMOS Discrete Segmented Regions On-Resistance Reduction
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Solution Overview
Problem
Conventional high voltage LDMOS devices have a high specific on-resistance due to the interaction between the n-grade region and the fully doped p-type region, which limits their performance in terms of power consumption and operating speed.
Innovation Solution
The introduction of discrete n-grade and p-top regions in a criss-cross arrangement within the high voltage n-well, with varying depths, widths, and separation distances, reduces the on-resistance while maintaining a similar breakdown voltage compared to devices with continuous regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If continuous n-grade and p-top regions are used in conventional LDMOS devices, then the breakdown voltage is maintained, but the on-resistance becomes too high
Solution Approach 1:
The continuous n-grade and p-top regions are divided into discrete segments arranged in a criss-cross pattern. This segmentation allows the depletion regions to interact more effectively during breakdown while reducing the resistive loss during on-state operation, as the discrete segments create more efficient charge distribution and lower resistance paths.
Solution Approach 2:
The invention transitions from a two-dimensional continuous region structure to a three-dimensional discrete segmented structure with varying depths, widths, and separation distances. This dimensional change enables the depletion regions to extend more effectively in vertical directions while maintaining horizontal breakdown protection, thereby reducing on-resistance without sacrificing breakdown voltage.
2Speed
If the channel length is decreased for high speed capability, then the operating speed improves, but the power dissipation increases
Solution Approach 1:
The discrete segmented structure provides different local properties in different regions of the device. The segmented n-grade and p-top regions create localized depletion zones that can be optimized for both high-speed operation and low power dissipation, allowing the channel to maintain short length for speed while the segmented structure reduces overall power loss through improved charge distribution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration results in a significant reduction of on-resistance by approximately 11.6% at a drain voltage of 1 volt, enhancing the operational efficiency and speed of the LDMOS device without compromising breakdown voltage.
Implementation Method 1
The introduction of discrete n-grade and p-top regions in a criss-cross arrangement within the high voltage n-well, with varying depths, widths, and separation distances, reduces the on-resistance
Data Source
AI summary
An improved semiconductor is provided whereby n-grade and the p-top layers are defined by a series of discretely placed n-type and p-type diffusion segments. Also provided are methods for fabricating such a semiconductor.