LDMOS Drift Region Diminution for Breakdown Voltage

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Solution Overview

Problem

Conventional LDMOS devices face a trade-off between breakdown voltage (BVDSS) and drain-source on-resistance (Rdson), where increasing BVDSS often results in higher Rdson, limiting their high-voltage applications, and reducing Rdson compromises BVDSS, making it challenging to achieve both high voltage and low resistance simultaneously.

Innovation Solution

The LDMOS devices incorporate a diminished drain-side section of the drift region, which enhances the reduced surface field (RESURF) effect by ensuring full depletion under the drain region, even at long drift lengths, thereby increasing BVDSS beyond typical limits without significantly increasing Rdson, achieved through a lateral and vertical non-uniform dopant concentration profile and a current pass section that connects the drain to the remainder of the drift region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the length of the drift space is increased or dopant concentration is reduced to increase BVDSS, then breakdown voltage is improved, but drain-source on-resistance increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddrain-source on-resistance
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The drift region is divided into two sections with different dopant concentrations: a first section with lower dopant concentration to achieve full depletion and high breakdown voltage, and a second section with higher dopant concentration to maintain low on-resistance. This local differentiation allows each section to optimize for its specific function, resolving the contradiction between high BVDSS and low Rdson.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The drift region is segmented into multiple sections along the direction of charge carrier flow, with each section having optimized dopant concentration. The first section (closer to drain) has lower concentration for depletion, while the second section (closer to channel) has higher concentration for conduction, allowing simultaneous optimization of both breakdown voltage and on-resistance.

Inventive Principle:
Principle #1Segmentation

2Reliability

If device area is increased to reduce Rdson, then current rating is improved, but manufacturing cost increases

Engineering Contradiction:
Improvecurrent ratingVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

By creating a drift region with spatially varying dopant concentration, the patent achieves lower on-resistance in the second section without increasing device area. The higher dopant concentration in the second section provides better conduction properties, allowing the same device area to handle higher currents, thus improving current rating without increasing manufacturing cost.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration allows for higher BVDSS levels (up to 15-20V more than conventional devices) with lower Rdson, suitable for high-voltage applications like automotive systems, without adding complexity or cost, and maintains low on-resistance across a wide range of voltages.

Implementation Method 1

The RESURF structure is designed to deplete the drift space of the LDMOS device in both vertical and lateral directions, thereby reducing the electric field in the PN junctions surrounding the drift region and thus raising the breakdown voltage (BVDSS) of the device

Methodology Applied
Scientific EffectReduced surface field (RESURF) effect: Electric Field

Implementation Method 2

a drift region in the semiconductor substrate, on which the drain region is disposed, and through which the charge carriers drift under an electric field arising from application of a bias voltage between the source and drain regions

Methodology Applied
Scientific EffectCharge carrier drift: Diffusion

Data Source

PatentUS9136323B2Drain-end drift diminution in semiconductor devices
Publication Date: 2015.09.15 NXP USA INC
  • US9136323B2 patent drawing
  • US9136323B2 patent drawing
  • US9136323B2 patent drawing

AI summary

A method of fabricating a transistor includes forming a field isolation region in a substrate. After forming the field isolation region, dopant is implanted in a first region of a substrate for formation of a drift region. A drain region is formed in a second region of the substrate. The first and second regions laterally overlap to define a conduction path for the transistor. The first region does not extend laterally across the second region.