LDMOS Field Plate Layout for Higher Breakdown in Less Area
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Solution Overview
Problem
Conventional LDMOS transistor devices face challenges in enhancing electrical performance and reducing area occupancy in high-voltage applications, necessitating improvements in structure and process design.
Innovation Solution
A power metal-oxide-semiconductor structure is developed with an electrically conductive pattern and field plate disposed on the same side of the gate electrode, improving electrical performance by increasing breakdown voltage and reducing on-resistance, and the manufacturing method integrates these components to optimize process integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional LDMOS transistor device structure is used, then high voltage capability is achieved, but area occupancy is large and electrical performance is limited
Solution Approach 1:
The patent implements nesting by placing the electrically conductive pattern inside the field plate structure, creating a nested configuration where one component is positioned within the boundaries of another. This nested arrangement allows both components to occupy overlapping spatial regions, significantly reducing the overall area footprint while maintaining the high voltage breakdown capability through the field plate's extended coverage
Solution Approach 2:
The patent transitions from a conventional planar side-by-side arrangement to a vertical stacked configuration by positioning the electrically conductive pattern and field plate at different vertical levels. This dimensional change from horizontal to vertical spacing allows the components to coexist in the same horizontal footprint while maintaining proper electrical isolation and functionality, thereby reducing area occupancy
2Reliability
If conventional LDMOS transistor device structure is used, then high voltage capability is achieved, but electrical performance is limited
Solution Approach 1:
The patent applies multi-functionality by designing the electrically conductive pattern to serve multiple purposes: it acts as an electrical connection path, provides structural support, and influences the electric field distribution. This multi-functional design allows a single component to fulfill several roles that would traditionally require separate elements, thereby improving electrical performance without proportionally increasing structural complexity
Solution Approach 2:
The patent merges the electrically conductive pattern and field plate into a integrated structure where they work together as a unified system. By combining these components into a closely integrated arrangement with the gate electrode, the patent achieves improved electrical performance through enhanced field control and current distribution while avoiding the complexity of managing separate, independently positioned components
3Area of stationary object
If field plate and electrically conductive pattern are disposed at the same side of gate electrode, then area occupancy is reduced, but manufacturing integration becomes challenging
Solution Approach 1:
The patent applies preliminary action by forming the electrically conductive pattern and field plate structure before finalizing the gate electrode positioning. This sequential approach allows the conductive pattern and field plate to be pre-configured in their nested arrangement, simplifying subsequent manufacturing steps and ensuring proper alignment while maintaining reduced area occupancy
Data Source
AI summary
A power metal-oxide-semiconductor structure includes a semiconductor substrate, a gate electrode disposed above the semiconductor substrate, a field plate, and an electrically conductive pattern. The gate electrode and the field plate are disposed above the semiconductor substrate, the electrically conductive pattern is disposed between the field plate and the semiconductor substrate in a vertical direction, and the field plate and the electrically conductive pattern are located at the same side of the gate electrode in a horizontal direction. A manufacturing method of a power metal-oxide-semiconductor structure includes the following steps. The electrically conductive pattern and the field plate are formed above a first region of the semiconductor substrate. Subsequently, the gate electrode is formed above the first region of the semiconductor substrate.