LDMOS Device With Segmented LDD Region For Breakdown Voltage
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Solution Overview
Problem
High voltage LDMOS devices face a trade-off between breakdown voltage and conduction resistance, where increasing breakdown voltage decreases operation speed and increasing conduction resistance limits device applications.
Innovation Solution
A high voltage device design featuring a semiconductor substrate with an isolation structure, a gate, a body region, a well, sources, and a lightly doped diffusion (LDD) region, where the LDD region is formed between the gate and drain without direct contact, enhancing the depletion region and reducing the electric field in OFF operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the thicknesses of the isolation oxide region and the field oxide region are decreased, then the conduction resistance of the LDMOS device is decreased, but the breakdown voltage of the LDMOS device is undesirably decreased
Solution Approach 1:
The device is segmented into multiple functional regions including a first drift region, a second drift region, an LDD region, and a well region. This segmentation allows each region to be optimized independently for its specific function, enabling the device to achieve low conduction resistance in the first drift region while maintaining high breakdown voltage through the structured arrangement of the second drift region and LDD region
Solution Approach 2:
Different regions of the device are assigned different doping concentrations and structural characteristics tailored to their specific functions. The first drift region has optimized doping for low resistance conduction, while the second drift region and LDD region have structured doping profiles optimized for high breakdown voltage, achieving local optimization of both contradictory requirements
2Reliability
If the thicknesses of the isolation oxide region and the field oxide region are increased, then the withstand voltage of the LDMOS device is increased, but the conduction resistance of the LDMOS device is undesirably increased and the operation speed is decreased
Solution Approach 1:
The device structure is divided into distinct functional zones where the first drift region provides a low-resistance conduction path for high-speed operation, while the second drift region and LDD region provide the necessary voltage withstand capability. This segmentation allows the device to achieve both high speed and high breakdown voltage simultaneously
Solution Approach 2:
The first drift region is optimized with doping concentrations and thickness specifically for low conduction resistance and high-speed operation, while the second drift region and LDD region are optimized for high breakdown voltage. This local quality differentiation resolves the contradiction between speed and breakdown voltage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves a higher breakdown voltage without adversely affecting conduction resistance, allowing the device to withstand higher voltages while maintaining operational speed.
Implementation Method 1
the LDD region is formed between the gate and drain without direct contact, enhancing the depletion region and reducing the electric field in OFF operation
Data Source
AI summary
The present invention provides a high voltage device and manufacturing method thereof. The high voltage device includes: a semiconductor substrate, an isolation structure, a gate, a body region, a well, a source, a drain and a lightly doped diffusion (LDD) region. The isolation structure is formed on an upper surface of the semiconductor substrate, for defining a device region, The LDD region is formed on the well in the device region. In a lateral direction, the LDD region is located between the gate and the drain, and the LDD region is not in direct contact with the drain.


