LDO Ripple Cancellation Circuit With Capacitive Feed-Forward PSRR Boost
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Solution Overview
Problem
Existing low-dropout regulators (LDOs) face challenges in achieving high power supply rejection ratio (PSRR) performance at high frequencies due to limitations in quiescent current and power consumption, particularly with resistive feed-forward ripple cancellation techniques, which result in system instability and bandwidth reduction.
Innovation Solution
A capacitive feed-forward ripple cancellation (CFFRC) technique replaces resistors with capacitors and pseudo-resistors to minimize quiescent current, using a back-to-back pseudo-resistor structure to define a DC bias point, thereby improving PSRR performance without additional power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If resistive feed-forward ripple cancellation (FFRC) is used to improve PSRR performance, then power supply noise is offset through feed-forward path, but power consumption increases due to continuous bias current flowing through resistors
Solution Approach 1:
The patent changes the fundamental parameter of the feed-forward path from resistive to capacitive coupling. By replacing resistors with capacitors in the feed-forward ripple cancellation path, the continuous bias current requirement is eliminated while maintaining the noise offset function, thus improving PSRR without the associated power consumption penalty
Solution Approach 2:
The patent substitutes the resistive mechanism with a capacitive mechanism in the feed-forward path. The capacitive coupling provides the necessary signal transmission for ripple cancellation without requiring continuous current flow, effectively replacing the power-consuming resistive approach with a power-efficient capacitive approach
2Use of energy by moving object
If quiescent current is reduced to minimize power consumption, then power consumption decreases, but PSRR performance degrades due to insufficient current for proper circuit operation
Solution Approach 1:
The patent changes the operational mode of the feed-forward path from current-based (resistive) to voltage-based (capacitive) operation. This parameter change allows the circuit to achieve effective ripple cancellation with minimal quiescent current, as capacitors can maintain voltage relationships without requiring continuous current flow
Solution Approach 2:
The capacitive feed-forward path operates by charging and discharging capacitors in response to input voltage variations, effectively performing ripple cancellation through periodic action rather than continuous current flow, enabling low quiescent current operation while maintaining PSRR performance
3Ease of operation
If resistors are used in feed-forward amplifier and summing amplifier, then circuit operation is simplified, but system stability is reduced and bandwidth is limited due to dominant pole effects
Solution Approach 1:
The patent changes the coupling parameter from resistive to capacitive in the amplifier stages. This substitution removes the dominant pole introduced by resistors, thereby extending the bandwidth and improving system stability while maintaining ease of operation through similar circuit topologies
Solution Approach 2:
The patent substitutes resistive coupling with capacitive coupling in the amplifier stages. This substitution eliminates the bandwidth-limiting effect of resistors while preserving the functional operation of the amplifiers, achieving both high bandwidth and ease of operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The CFFRC technique enhances PSRR up to unity gain bandwidths of the LDO, achieving improved performance with low quiescent current consumption, stabilizing the system across various load conditions and frequencies.
Implementation Method 1
a first capacitor having one end connected to the input terminal and the other end connected to a negative input terminal of the feed-forward amplifier
Data Source
AI summary
Disclosed herein is a voltage regulator having a capacitive feed-forward ripple cancellation circuit, which includes a pass unit configured to transfer, in response to a control signal, an input voltage provided from an input terminal to an output voltage of an output terminal, an error amplification unit configured to output a comparison signal on the basis of a magnitude comparison result between the output voltage and a reference voltage, and a capacitive feed-forward ripple cancellation unit configured to remove a ripple included in the input voltage using the reference voltage and the comparison signal in order to generate the control signal. In accordance with the present invention, a circuit capable of removing power supply noise while consuming a low quiescent current through a capacitive feed-forward ripple cancellation technique can be provided.