LDO PSR Enhancer Using Negative Capacitance Cancellation

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Solution Overview

Problem

Low-dropout (LDO) regulators face challenges in rejecting power supply noise due to parasitic capacitances, leading to degraded power supply rejection (PSR) performance, especially across process corners, and inefficient power usage when high PSR is not required.

Innovation Solution

The implementation of a system that includes a metal-oxide-semiconductor (MOS) capacitor coupled between the output of an amplifying circuit and the gate of a pass transistor, along with an amplifying circuit and a high-pass filter, to generate a negative capacitance that cancels out parasitic capacitances, and adaptive current biasing to optimize power efficiency based on current load.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an LDO regulator is used to provide regulated voltage, then power supply noise is rejected to some extent, but parasitic capacitances degrade PSR performance especially across process corners

Engineering Contradiction:

Improvepower supply rejection performanceVSAvoidparasitic capacitance effect

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by introducing a circuit that generates negative capacitance to preemptively counteract the parasitic capacitance effects in the LDO regulator. The negative capacitance circuit is designed to produce an opposing capacitive effect that cancels out the harmful parasitic capacitances before they can degrade the PSR performance, thereby maintaining reliable power supply rejection across process corners.

Inventive Principle:

Principle #9Preliminary anti-action

Solution Approach 2:

The patent uses an intermediary approach by introducing a negative capacitance circuit as a mediator between the power supply noise and the LDO regulator. This intermediary circuit generates a compensating signal that offsets the parasitic capacitance effects, allowing the LDO regulator to maintain its PSR performance without directly modifying the regulator itself.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If PSR enhancement circuitry is always active to maintain high PSR performance, then power supply noise rejection is improved, but power consumption increases

Engineering Contradiction:

Improvepower supply rejection performanceVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the PSR enhancement circuitry operable in a dynamic manner rather than continuously active. The circuit can be enabled or disabled based on operational requirements, allowing the system to maintain high PSR performance when needed while reducing power consumption during normal operation. This dynamic control resolves the contradiction between maintaining reliable PSR and minimizing power usage.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent uses parameter changes by controlling the operational state of the negative capacitance circuit. By changing the operational parameter (active/inactive state) of the PSR enhancement circuitry based on system requirements, the patent achieves variable PSR performance levels that match the actual noise environment, thereby optimizing the trade-off between PSR reliability and power consumption.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances PSR performance across process corners and improves power efficiency by dynamically adjusting the PSR enhancer's operation based on the current load, ensuring cleaner regulated voltage and reduced power consumption.

Implementation Method 1

generate a negative capacitance that cancels out parasitic capacitances

Methodology Applied

Scientific EffectNegative capacitance:

Implementation Method 2

cancels out parasitic capacitances

Methodology Applied

Scientific EffectParasitic capacitance cancellation: Parasitic Capacitance

Implementation Method 3

a high-pass filter coupled between a gate of a pass transistor of a low dropout (LDO) regulator and the input of the amplifying circuit

Methodology Applied

Scientific EffectHigh-pass filtering: Filter (electronic)

Data Source

PatentUS12181903B2Power supply rejection enhancer

Publication Date: 2024.12.31 QUALCOMM INC

AI summary

In certain aspects, a system includes an amplifying circuit having an input and an output, a high-pass filter coupled between a gate of a pass transistor of a low dropout (LDO) regulator and the input of the amplifying circuit, and a metal-oxide-semiconductor (MOS) capacitor coupled between the output of the amplifying circuit and the gate of the pass transistor.