LDO PSRR Boost Circuit With Adaptive Bias Current Injection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing techniques for improving Power Supply Ripple Rejection (PSRR) in low-dropout voltage regulators (LDO) often require large bias currents, which negatively impact quiescent current consumption.

Innovation Solution

An adaptive PSRR boost circuit is introduced that generates a bias current proportional to the output current, using a diode-connected transistor and a varactor diode to inject compensation into the regulation loop, thereby enhancing PSRR without significantly increasing current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If large bias currents are used to improve PSRR, then power supply ripple rejection is enhanced, but quiescent current consumption increases

Engineering Contradiction:
ImprovePSRRVSAvoidquiescent current consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements a dynamic bias current adjustment mechanism where the bias current is varied based on the detected ripple frequency and amplitude. The system transitions from a static bias current approach to a dynamic one, allowing the bias current to be increased only when and where ripple suppression is needed, thereby improving PSRR selectively without proportionally increasing overall quiescent current consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention applies ripple suppression selectively to specific frequency ranges and circuit nodes where ripple is most problematic. By using frequency-selective filtering and targeted bias current injection at critical nodes (such as the error amplifier input), the system achieves local improvement in PSRR at problematic frequencies without applying large bias currents across the entire circuit, thus reducing overall current consumption.

Inventive Principle:
Principle #3Local quality

2Reliability

If frequency-selective PSRR enhancement is implemented, then high-frequency ripple suppression is improved, but device complexity increases

Engineering Contradiction:
Improvehigh-frequency ripple suppressionVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary frequency-selective filter network and a controlled current source that acts as a mediator between the bias current generation and the main regulation loop. This intermediary structure enables frequency-selective ripple suppression by filtering specific frequency components before they affect the output, while the controlled current source provides targeted compensation current only at problematic frequencies, achieving high-frequency suppression without requiring complete redesign of the entire regulator circuit.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention implements a feedback mechanism where the output voltage ripple is detected and fed back to control the bias current injection. The system monitors the ripple content at the output and dynamically adjusts the PSRR enhancement circuitry accordingly. This feedback approach allows the system to achieve frequency-selective suppression by detecting specific ripple frequencies and applying corrective bias currents only when and where needed, reducing the need for complex hardwired frequency-selective circuits.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250321603A1Adaptive power supply ripple rejection enhancement in voltage regulators
Publication Date: 2025.10.16 SEMICON COMPONENTS IND LLC
  • US20250321603A1 patent drawing
  • US20250321603A1 patent drawing
  • US20250321603A1 patent drawing

AI summary

A regulator circuit includes a first stage, a second stage, and a boost circuit. The first stage includes a reference input and a feedback input, the feedback input configured to receive feedback from an output of the regulator circuit. The second stage is coupled to the first stage. The second stage includes an output transistor configured to drive the output of the regulator circuit. The boost circuit includes a first transistor configured to generate a bias current based on an output current of the output transistor. The boost circuit further includes a current-to-voltage converter configured to generate a bias voltage based on the bias current, and a capacitive element coupled between the current-to-voltage converter and a node of the first stage.