Irregular LDPC Decoder Block Sequencing for Higher Throughput
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Solution Overview
Problem
Low density parity check (LDPC) decoders face complexity in interconnect issues and inefficiencies in processing irregular LDPC codes, leading to suboptimal performance and increased resource utilization in communication and data storage systems.
Innovation Solution
The proposed solution involves a novel technique for decoding LDPC codes by processing blocks out of order, using a control unit to determine a processing sequence based on extracted parameters from the LDPC code matrix, and employing an offset min-sum algorithm with cyclic shift mechanisms to optimize decoding performance and reduce memory requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If LDPC decoders process blocks in conventional order, then processing is straightforward, but message storage memory requirements increase and throughput decreases
Solution Approach 1:
The patent inverts the conventional processing order by processing LDPC code blocks in reverse sequence (from last to first). This inversion allows the decoder to reuse message storage memory locations across different blocks, significantly reducing the total memory required while maintaining decoding performance and improving throughput through better resource utilization.
Solution Approach 2:
The patent implements a memory management strategy where message storage memory is discarded (cleared) after processing each block and then recovered (reused) for the next block. This approach eliminates the need to allocate separate memory for each block, reducing overall memory requirements while enabling continuous processing that improves throughput.
2Productivity
If LDPC decoders use parallel processing, then throughput improves, but interconnect complexity increases
Solution Approach 1:
The patent segments the LDPC decoding process into independent block processing units that can operate in parallel. Each processing unit handles a specific block independently, allowing parallel execution without requiring complex interconnect structures to manage data dependencies between blocks. This segmentation maintains simplicity while achieving improved throughput through parallelism.
3Adaptability or versatility
If LDPC decoders process irregular codes, then code versatility improves, but processing efficiency decreases
Solution Approach 1:
The patent employs parameter changes by dynamically adjusting the processing sequence and memory access patterns based on the specific characteristics of irregular LDPC codes. By extracting parameters from the code structure and adapting the processing order accordingly, the system maintains high processing efficiency while supporting versatile irregular code configurations.
Data Source
AI summary
A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes a control unit that controls decoder processing, the control unit causing the decoder to process the blocks of a low density parity check (“LDPC”) matrix out of order. A decoder embodiment may process the layers of the LDPC matrix out of order and/or perform partial state processing on out of order blocks of the LDPC matrix and/or generate R messages out of order.