LDPC Check Node Minimum-Value Circuit With Paired Comparators
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Solution Overview
Problem
Existing LDPC decoders employing the min-sum algorithm require complex circuitry to identify the two minimum values, leading to high hardware complexity, latency, and power dissipation.
Innovation Solution
A method and apparatus that approximate the two minimum values by partitioning input values into pairs, using comparators to select one value from each pair, and applying the resulting vector to identify the first and second extreme values, reducing the complexity of the processor without significant degradation in corrective capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If complex circuitry is used to identify the two minimum values in LDPC decoders, then the precision of finding minimum values is improved, but the device complexity increases
Solution Approach 1:
The patent segments the set of input values into multiple subsets and processes each subset separately to identify minimum values. This segmentation approach reduces the complexity of comparing all values simultaneously while maintaining acceptable precision in identifying the two minimum values needed for the min-sum algorithm.
2Measurement precision
If complex circuitry is used to identify the two minimum values, then the measurement precision is improved, but the power dissipation increases
Solution Approach 1:
By segmenting the value set into subsets and processing them in parallel, the patent reduces the overall power consumption compared to a single complex circuit processing all values sequentially or simultaneously, while maintaining the precision needed for accurate minimum value identification.
3Measurement precision
If complex circuitry is used to identify the two minimum values, then the measurement precision is improved, but the latency increases
Solution Approach 1:
The patent divides the input values into multiple subsets that can be processed in parallel. This segmentation enables simultaneous processing of different value groups, reducing the overall latency compared to sequential processing methods, while still accurately identifying the two minimum values through subsequent comparison steps.
4Reliability
If the sum-product algorithm is used for LDPC decoding, then the coding gain is improved, but the device complexity increases
Solution Approach 1:
The patent employs simplified computing elements that approximate the full sum-product algorithm functionality. These simpler elements perform the essential minimum value identification operations needed for LDPC decoding with acceptable accuracy, reducing hardware complexity while maintaining sufficient coding gain for practical applications.
Data Source
AI summary
The present invention is directed toward identifying selected values from among a set of values. In accordance with an embodiment, a method of identifying two selected values from among a plurality of values comprises: partitioning the plurality of values into pairs of values; for each pair of values, using a comparator to select one of the two values to form a vector from the selected value of each pair; and applying the vector to a hardware unit that identifies first and second extreme values from among the values of the vector.