Layered LDPC Decoding With Zigzag Scheduling for Fast Convergence
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Solution Overview
Problem
Conventional LDPC decoding systems face challenges in reducing overhead while maintaining low error rates and convergence speed, particularly for small-to-medium blocklength high-rate QC-LDPC codes, which require more than one diagonal per sub-matrix and limit partial-parallel processing.
Innovation Solution
The proposed method employs a zigzag message passing schedule within a parity check matrix using a control circuit that sequences updates in a zigzag pattern, performing forward operations on even iterations and backward operations on odd iterations, allowing for partially-parallel computations and reducing computational complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional LDPC decoding systems use traditional message passing schedules (flooding or sequential), then decoding convergence is achieved, but computational complexity and overhead increase
Solution Approach 1:
The patent segments the message passing process into distinct forward and backward passes through the parity check matrix. Each pass processes a specific subset of check nodes and variable nodes in sequence, dividing the overall decoding task into manageable segments that reduce per-iteration complexity while maintaining convergence
Solution Approach 2:
The patent implements periodic alternation between forward and backward message passing directions across iterations. Odd iterations perform forward passes while even iterations perform backward passes, creating a periodic pattern that maintains decoding convergence while reducing computational overhead in each individual iteration
2Productivity
If small-to-medium blocklength high-rate QC-LDPC codes use more than one diagonal per sub-matrix, then coding rate is improved, but partial-parallel processing capability deteriorates
Solution Approach 1:
The patent dynamically adjusts the message passing schedule based on the specific structure of QC-LDPC codes with multiple diagonals per sub-matrix. The control circuit identifies the diagonal structure and adapts the forward/backward pass sequences to exploit available parallelism while accommodating the multi-diagonal configuration, enabling both high coding rates and partial-parallel processing
3Speed
If sequential message passing schedules are used to update nodes sequentially, then convergence speed improves, but computational complexity per iteration increases
Solution Approach 1:
The patent performs partial sequential updates within each iteration by executing forward and backward passes that process only specific subsets of nodes in sequence, rather than updating all nodes sequentially. This partial action maintains convergence speed benefits while limiting the increase in per-iteration computational complexity
Data Source
AI summary
Low density parity check (LDPC) decoders are described utilizing a sequential schedule called Zigzag LBP (Z-LBP), for a layered belief propagation (LBP) architecture. Z-LBP has a lower computational complexity per iteration than variable-node-centric LBP (V-LBP), while being simpler than flooding and check-node-centric LBP (C-LBP). For QC-LDPC codes where the sub-matrices can have at most one “1” per column and one “1” per row, Z-LBP can perform partially-parallel decoding with the same performance as C-LBP. The decoder comprises a control circuit and memory coupled to a parity check matrix. Message passage is performed within Z-LBP in a first direction on odd iterations, and in a second direction on even iterations. As a result, a smaller parity check matrix can be utilized, while convergence can be more readily attained. The inventive method and apparatus can also be implemented for partially-parallel architectures.