Leadframe Bodies Form Encapsulant Openings for Vertical Interconnect
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Solution Overview
Problem
Conventional semiconductor device packaging methods, such as fan-out wafer level chip scale packages (Fo-WLCSP), face challenges with time-consuming and defect-prone conductive via formation, leading to manufacturing yield and cost issues due to warpage and electrical shorts.
Innovation Solution
A semiconductor device design that uses a leadframe with integrated bodies to form openings through an encapsulant in a honeycomb arrangement for vertical interconnect, allowing for simpler and cost-effective electrical connection between the semiconductor die and the substrate, reducing the risk of defects and warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional conductive via formation methods are used, then vertical electrical interconnect is achieved, but the process is time-consuming and defect-prone leading to low manufacturing yield
Solution Approach 1:
The leadframe bodies are pre-formed with integrated cavities before encapsulation. The encapsulant is then molded around these pre-formed bodies, creating openings automatically as the bodies are removed. This preliminary preparation eliminates the need for time-consuming post-encapsulation via formation processes, thereby improving both manufacturing yield and efficiency
Solution Approach 2:
The leadframe bodies serve as temporary intermediary structures during manufacturing. These bodies are integrated into the encapsulant during molding, then removed to create clean, precise openings without requiring complex via formation processes. This intermediary approach simplifies the overall manufacturing process and reduces defects
2Reliability
If conventional conductive via formation is used, then vertical interconnect is achieved, but warpage and electrical shorts occur increasing defect rates
Solution Approach 1:
The harmful plating process and associated defects are completely extracted from the manufacturing process. Instead of forming vias through plating after encapsulation, the leadframe bodies are removed to create clean openings that are then filled with conductive material in a controlled manner, eliminating warpage and electrical short defects associated with conventional methods
Solution Approach 2:
The openings are pre-formed through leadframe body removal before final conductive material deposition. This preliminary opening creation ensures precise geometry and positioning, preventing electrical shorts and warpage that occur when vias are formed later in the process
3Ease of manufacture
If leadframe bodies are used to form openings, then simpler and cost-effective electrical connection is achieved, but structural complexity of packaging increases
Solution Approach 1:
The leadframe bodies are merged with the encapsulant structure during the molding process. The bodies are integrated into the encapsulant as it cures, creating a unified structure that simplifies subsequent manufacturing steps. This merging eliminates the need for separate via formation processes and reduces overall packaging complexity
Solution Approach 2:
The leadframe bodies serve multiple functions: they provide structural support during molding, define the geometry of future openings, and act as placeholders for conductive material placement. This multi-functionality reduces the number of separate components and processes needed, simplifying manufacturing despite the initial appearance of added complexity
Data Source
AI summary
A semiconductor device has a leadframe with a plurality of bodies extending from the base plate. A first semiconductor die is mounted to the base plate of the leadframe between the bodies. An encapsulant is deposited over the first semiconductor die and base plate and around the bodies of the leadframe. A portion of the encapsulant over the bodies of the leadframe is removed to form first openings in the encapsulant that expose the bodies. An interconnect structure is formed over the encapsulant and extending into the first openings to the bodies of the leadframe. The leadframe and bodies are removed to form second openings in the encapsulant corresponding to space previously occupied by the bodies to expose the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with bumps extending into the second openings of the encapsulant to electrically connect to the interconnect structure.


