Leadframe Conductive Bodies for Vertical Interconnect
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Solution Overview
Problem
Conventional semiconductor device packaging methods, such as fan-out wafer level chip scale packages (Fo-WLCSP), face challenges with time-consuming plating processes and susceptibility to voids and defects, particularly due to warpage and electrical shorts during the formation of conductive vias for vertical electrical interconnects.
Innovation Solution
A leadframe with integrated tie bars and conductive bodies is used, where the tie bars have a down step with an angled surface and horizontal surface, allowing for the deposition of an encapsulant that isolates the conductive bodies upon singulation, thereby providing a stable and defect-free vertical electrical interconnect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional plating process is used to form conductive vias, then vertical electrical interconnect is achieved, but the process is time-consuming and susceptible to voids and defects
Solution Approach 1:
The conductive bodies are pre-formed as integrated structures with the leadframe during the leadframe manufacturing process, before the encapsulant deposition and singulation steps. This preliminary formation of conductive structures eliminates the need for time-consuming post-assembly plating operations and ensures consistent conductive pathways without voids or defects.
Solution Approach 2:
The conductive bodies are merged with the leadframe structure to form an integrated unit. The leadframe and conductive bodies are manufactured together as a single component, combining multiple functions (structural support, electrical connection, and interconnect) into one integrated part, thereby eliminating separate plating processes.
2Reliability
If conductive vias are formed through encapsulant, then vertical electrical interconnect is achieved, but warpage and electrical shorts occur
Solution Approach 1:
The harmful plating process and encapsulant drilling operations are extracted from the manufacturing sequence. Instead of forming vias through the encapsulant after assembly, the conductive bodies are pre-formed with the leadframe, and the encapsulant is simply deposited over the structure, eliminating the sources of warpage and electrical shorts associated with via formation.
Solution Approach 2:
All conductive structures are preliminarily formed with the leadframe before encapsulant deposition. This preliminary action ensures that conductive pathways are established without subsequent drilling or plating that could cause warpage or electrical shorts, and the encapsulant serves only as a protective coating.
3Reliability
If leadframe is singulated after encapsulant deposition, then conductive bodies are electrically isolated, but defects from electrical shorts may occur
Solution Approach 1:
The encapsulant serves as an intermediary material that provides electrical isolation between conductive bodies during the singulation process. By depositing the encapsulant over the conductive bodies before singulation, the material acts as a protective barrier that prevents electrical shorts during cutting, ensuring defect-free isolation without requiring precise singulation control.
Data Source
AI summary
A semiconductor device has a semiconductor die mounted to a substrate. A leadframe has a base plate and integrated tie bars and conductive bodies. The tie bars include a down step with an angled surface and horizontal surface between the conductive bodies. The leadframe is mounted to the semiconductor die and substrate with the base plate disposed on a back surface of the semiconductor die and the conductive bodies disposed around the semiconductor die and electrically connected to the substrate. An encapsulant is deposited over the substrate and semiconductor die and into the down step of the tie bars. A conductive layer is formed over the conductive bodies to inhibit oxidation. The leadframe is singulated through the encapsulant in the down step and through the horizontal portion of the tie bars to electrically isolate the conductive bodies. A semiconductor package can be mounted to the substrate and semiconductor die.