Leadless Chip Carrier with Edge-Mounted Contacts
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Solution Overview
Problem
Conventional microelectronics packaging methods result in large package sizes, high manufacturing costs, and long production cycles due to the need for wirebonding and separate chip holders, which can be improved by integrating the IC and electrical contacts on a single substrate for direct surface mounting.
Innovation Solution
A semiconductor wafer with integrated circuit regions and edge-mounted electrical contacts, where vias are formed to extend into saw streets and filled with conductive material, allowing for direct integration of ICs onto a substrate with exposed contacts for solderable surface mounting, eliminating the need for wirebonding and separate chip holders.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional microelectronics packaging methods are used with separate chip holders and wirebonding, then mechanical and environmental protection is provided, but package size becomes large and manufacturing cost increases
Solution Approach 1:
The patent merges the chip carrier substrate and integrated circuit into a single integrated structure, eliminating the need for separate chip holders. The electrical contacts are formed directly on the substrate edges, combining multiple functions (substrate, IC mounting, electrical connection) into one component, thereby reducing overall package size while maintaining protection and connectivity
Solution Approach 2:
The patent extracts and eliminates the wirebonding step from the conventional packaging process. By forming electrical contacts directly on the substrate edges that can be soldered to circuit boards, the design removes the intermediate wirebonding connection layer, simplifying the structure and reducing package dimensions
2Reliability
If conventional packaging with wirebonding is used, then reliable electrical connections are achieved, but manufacturing cycle time increases
Solution Approach 1:
The electrical contacts are formed on the substrate edges during the substrate fabrication process itself, before the integrated circuit is mounted. This preliminary formation of contact structures eliminates the need for subsequent wirebonding operations, reducing manufacturing cycle time while ensuring reliable electrical connections through direct soldering to the pre-formed contacts
Solution Approach 2:
The patent removes the wirebonding process step from the manufacturing sequence. By providing pre-formed electrical contacts on the substrate edges that can be directly soldered to circuit boards, the design eliminates the time-consuming wirebonding operation while maintaining electrical connection reliability
3Reliability
If separate chip holders and wirebonding are used, then electrical connections are established, but manufacturing cost increases
Solution Approach 1:
The patent combines the chip carrier substrate and integrated circuit into a single integrated structure, eliminating the need for separate chip holders and wirebonding operations. This consolidation reduces the number of components and assembly steps, thereby lowering manufacturing costs while maintaining reliable electrical connections through direct soldering
Solution Approach 2:
The patent extracts and eliminates the wirebonding process from the manufacturing sequence. By providing pre-formed electrical contacts on the substrate edges that can be directly soldered to circuit boards, the design removes the costly wirebonding operation while maintaining electrical connection reliability
Data Source
AI summary
A surface mountable chip comprises a semiconductor substrate having IC devices formed thereon and also vertically exposed electrical contacts formed as part of the IC fabrication substrate. Metallization lines electrically connect the IC devices with the contacts. The inventor also contemplates wafers having electrical connection vias in place on the wafers in preparation as a product for further fabrication. A method embodiment of the invention describes methods of fabricating such surface mountable chips.