Leakage Current Detection Circuit for Nonvolatile Memory Data Integrity
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Solution Overview
Problem
Nonvolatile memory devices face issues with data loss due to leakage currents in drive lines, which can disrupt program, read, and erase operations, leading to incorrect performance on memory cells coupled to defective lines.
Innovation Solution
A leakage current detection device is introduced, comprising a test detection circuit, a reference detection circuit, a comparator, and a latch circuit, which compares the voltage changes on a test line and a reference line to determine if a leakage current is present, using transistors and control signals to manage voltage levels and detection time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a drive line is used to perform program, read, and erase operations on memory cells, then the memory operations can be executed, but leakage current may flow from the drive line causing data loss and incorrect performance
Solution Approach 1:
The patent applies preliminary action by performing leakage current detection before normal memory operations. The test detection circuit charges the test line and measures leakage current at a first time point, and again at a second time point after a predetermined period. This preliminary detection identifies defective drive lines before they cause data loss during program, read, or erase operations, thereby maintaining data integrity while preserving memory operation capability.
2Reliability
If a test detection circuit is added to detect leakage current, then data integrity can be maintained, but the device complexity increases
Solution Approach 1:
The patent applies universality by designing the test detection circuit to perform multiple functions: it can detect leakage current on any drive line (word line, bit line, string selection line, or ground selection line) by selectively coupling different lines to the test node. The same circuit structure with minimal modification can test various types of drive lines, reducing overall device complexity while maintaining data integrity through comprehensive leakage detection.
Solution Approach 2:
The patent applies copying by creating a simplified test version of the drive line circuitry. The test detection circuit includes a test node that replicates the essential electrical characteristics of the memory cell array connection, allowing leakage current measurement without requiring a complete duplicate of the complex memory array. This copying approach enables reliable detection while keeping the added circuitry minimal.
3Reliability
If leakage current detection is performed continuously, then data loss can be prevented, but energy consumption increases
Solution Approach 1:
The patent applies periodic action by performing leakage current detection at specific time intervals rather than continuously. The circuit charges the test line and performs measurement at a first time point, then again at a second time point after a predetermined period has elapsed. This periodic detection schedule prevents data loss by identifying leakage issues while consuming energy only when necessary, significantly reducing overall energy consumption compared to continuous monitoring.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively detects leakage currents in nonvolatile memory devices, preventing data loss by identifying defective lines and ensuring accurate operations, thereby maintaining data integrity.
Implementation Method 1
decreases a voltage of the test node based on a leakage current flowing from the test line
Implementation Method 2
decreases a voltage of the reference node based on a self-discharge of the reference line
Implementation Method 3
The comparator outputs a comparison signal by comparing the voltage of the test node with the voltage of the reference node
Data Source
AI summary
A leakage current detection device includes a test detection circuit, a reference detection circuit, a comparator, and a latch circuit. The test detection circuit is coupled between a test node and a test line, provides a voltage to the test node to charge the test line, floats the test node and the test line, and decreases a voltage of the test node based on leakage current of the test line. The reference detection circuit is coupled between a reference node and a reference line, provides the voltage to the reference node to charge the reference line, floats the reference node and the reference line, and decreases a voltage of the reference node based on self-discharge of the reference line. The comparator outputs a comparison signal by comparing voltages of the test node and the reference node. The latch circuit latches the comparison signal to output a test result signal.