LED Assembly Electrode Layout for Focused Display Electric Fields
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Solution Overview
Problem
Current display devices face challenges in achieving high self-assembly rates for light emitting diodes (LEDs) due to limitations in electric field intensity and uniformity, particularly in minimizing unnecessary electric fields outside the correct assembly position and compensating for imbalanced fields.
Innovation Solution
The display device incorporates a substrate with sub-pixels featuring a first and second lower assembly electrode with a narrower interval than the upper assembly electrodes, forming an asymmetric lower and symmetric upper electrode structure to enhance electric field intensity specifically at the LED assembly position and minimize it elsewhere.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the interval between assembly electrodes is reduced to increase electric field intensity, then the self-assembly rate of LED improves, but the manufacturing precision and electrode layout complexity worsen
Solution Approach 1:
The patent transitions from a single-plane electrode arrangement to a multi-layer three-dimensional structure. Lower assembly electrodes are positioned on one plane while upper assembly electrodes are positioned on a different plane, allowing the interval between electrodes to be reduced without compromising manufacturing feasibility. This spatial reconfiguration enables intensified electric fields for improved LED self-assembly while maintaining practical manufacturing tolerances.
Solution Approach 2:
The patent employs asymmetric electrode design where lower assembly electrodes have a first interval and upper assembly electrodes have a second interval that is greater than the first. This asymmetric configuration allows optimization of the electric field in critical regions (where LED assembly is needed) while maintaining larger intervals in other regions for manufacturing ease, thus resolving the contradiction between field intensity and manufacturing precision.
2Device complexity
If a symmetric electrode structure is used for simplicity, then the device complexity is reduced, but the electric field uniformity and self-assembly precision worsen
Solution Approach 1:
The patent deliberately introduces asymmetry between lower and upper assembly electrodes, with the lower electrodes having a smaller interval than the upper electrodes. This asymmetric design creates a focused electric field distribution that enhances precision at the LED assembly location while maintaining overall structural manageability, thereby improving assembly position accuracy without excessive complexity.
Solution Approach 2:
The patent applies different interval characteristics to different regions of the electrode structure. The lower assembly electrodes have a first interval optimized for generating strong electric fields in specific local regions where LED assembly is required, while the upper assembly electrodes have a second interval optimized for other considerations. This local optimization of electrode spacing achieves high assembly precision without requiring complete symmetry throughout the entire structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the self-assembly rate of LEDs by maximizing electric field intensity at the correct position and reducing it elsewhere, leading to increased yield and reliability in the display device.
Implementation Method 1
a minimum interval of the first lower assembly electrode and the second lower assembly electrode is smaller than a minimum interval of the first upper assembly electrode and the second upper assembly electrode on the plane, so that the first lower assembly electrode and the second lower assembly electrode with a narrower interval are further disposed to increase the intensity of the electric field for self-assembling the light emitting diode
Data Source
AI summary
A display device includes a substrate in which a plurality of sub pixels is defined; a first lower assembly electrode disposed in each of the plurality of sub pixels; an interlayer insulating layer disposed below the first lower assembly electrode; a second lower assembly electrode disposed below the interlayer insulating layer; a passivation layer disposed on the first lower assembly electrode and the second lower assembly electrode; and a first upper assembly electrode and a second upper assembly electrode which are disposed on the passivation layer and are disposed to be spaced apart from each other, and a minimum interval of the first lower assembly electrode and the second lower assembly electrode is smaller than a minimum interval of the first upper assembly electrode and the second upper assembly electrode on the plane.