LED Chip Electrode Structure for Lower Thermal Resistance
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Solution Overview
Problem
CSP type semiconductor light emitting devices face issues with increased thermal resistance and assembly tolerance due to smaller pad electrodes, and there is a need to improve adhesion between encapsulation layers and electrodes, as well as prevent short-circuit problems during electrical connections.
Innovation Solution
The semiconductor light emitting device features first electrodes with larger planar areas than the chip, with exposed lower surfaces and an insulating material filled between the inner lateral surfaces, and a method involving a sacrificial substrate for manufacturing, where the sacrificial substrate is removed to expose the electrodes externally, allowing for improved electrical connections and reduced thermal resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If pad electrodes are reduced in size for CSP type devices, then device size is reduced, but thermal resistance increases and assembly tolerance deteriorates
Solution Approach 1:
The electrode structure transitions from a two-dimensional planar contact to a three-dimensional configuration with exposed lower surfaces. The first electrodes extend downward from the encapsulation layer, creating vertical heat conduction paths that bypass the limited lateral area of small pad electrodes, thereby reducing thermal resistance while maintaining compact device footprint.
Solution Approach 2:
The sacrificial substrate is removed in advance during the manufacturing process to pre-expose the lower surfaces of the first electrodes. This preliminary action enables subsequent direct bonding or welding of external electrical connections to the exposed electrode surfaces without requiring additional etching or removal steps, improving assembly tolerance and manufacturing efficiency.
2Volume of moving object
If pad electrodes are reduced in size for CSP type devices, then device size is reduced, but assembly tolerance deteriorates
Solution Approach 1:
The electrode structure provides both lateral extension for assembly alignment and vertical exposure for electrical connection. The exposed lower surfaces create additional degrees of freedom for bonding, allowing tolerance compensation in the lateral direction through vertical adjustment during assembly processes.
3Reliability
If encapsulation layers are added to cover electrodes, then electrical insulation is improved, but adhesion between encapsulation and electrodes deteriorates
Solution Approach 1:
The lower surfaces of the first electrodes are exposed in advance by removing the sacrificial substrate, allowing the encapsulation layer to be formed or applied in a way that ensures optimal adhesion. The exposed surfaces provide fresh, clean bonding areas that enhance mechanical and chemical adhesion between the encapsulation material and electrode surfaces.
4Ease of operation
If electrodes are exposed externally, then electrical connections are improved, but short-circuit risk increases
Solution Approach 1:
The electrical connections are established in the vertical dimension through exposed lower surfaces, spatially separating the connection points from each other. This three-dimensional arrangement naturally prevents short-circuits by maintaining adequate insulation distance between different electrical terminals while still providing accessible connection surfaces.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances adhesion between encapsulation layers and electrodes, reduces thermal resistance, and prevents short-circuits, thereby improving the reliability and efficiency of semiconductor light emitting devices.
Implementation Method 1
a sacrificial layer formed on the light-transmitting support plate; removing the sacrificial substrate to expose the first electrodes externally
Data Source
AI summary
The present disclosure relate to a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises a semiconductor light emitting chip, and first electrodes electrically connected to the semiconductor light emitting chip, with the first electrodes each having a planar area larger than that of the semiconductor light emitting chip, wherein lower surfaces of the first electrodes are exposed externally, and an insulating material is filled in-between inner lateral surfaces of the first electrodes.