LED Chip Edge Field Control for Stable Low-Current Efficiency
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Solution Overview
Problem
Existing optoelectronic components, particularly LED arrangements, face challenges with high current densities and unstable efficiency, especially at low current levels, due to parasitic diodes and increased charge carrier recombination at the mesa edges, which affect small LED chips significantly.
Innovation Solution
The implementation of a common edge field generation device that generates an electric field in the edge regions of semiconductor chips, controlling current flow and reducing charge carrier recombination by using a contiguous electrode to manage parasitic diodes and maintain consistent efficiency across the component.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If small LED chips are used to increase integration density, then productivity and area utilization are improved, but current density increases causing parasitic diodes and reduced reliability at edge regions
Solution Approach 1:
The patent applies different electrical properties to different regions of the LED chip by introducing a first electrically conductive layer at the edge regions with different conductivity characteristics than the second electrically conductive layer in the central region. This local differentiation suppresses parasitic diodes at edges while maintaining efficient current flow in the center, resolving the contradiction between high integration density and current flow stability.
Solution Approach 2:
The first electrically conductive layer acts as an intermediary element between the edge regions and the central region of the LED chip. It mediates the current distribution by providing a controlled conduction path that prevents excessive current concentration at edges, thereby maintaining reliability in high-density arrangements.
2Device complexity
If edge regions are left untreated, then device complexity is reduced, but charge carrier recombination increases causing efficiency loss
Solution Approach 1:
The patent changes the electrical conductivity parameter in the edge regions by introducing the first electrically conductive layer with different material composition or structure than the second electrically conductive layer. This parameter modification reduces charge carrier recombination at edges without requiring complex additional structures, balancing simplicity with efficiency.
3Manufacturing precision
If conventional uniform electrode structure is used, then manufacturing precision is maintained, but efficiency at low current densities deteriorates due to parasitic diodes
Solution Approach 1:
The patent introduces local quality variations in the electrode structure by placing the first electrically conductive layer specifically at edge regions while maintaining the second electrically conductive layer in the central region. This localized differentiation can be integrated into conventional manufacturing processes while significantly improving efficiency stability, particularly at low current densities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The edge field generation device effectively regulates current flow and reduces recombination rates, ensuring stable efficiency and reduced leakage currents, particularly at low current densities, thereby enhancing the performance of LED arrangements.
Implementation Method 1
Each semiconductor chip comprises a semiconductor layer sequence with an n-doped layer, a p-doped layer and an active zone. The active zone is configured to produce radiation by means of electroluminescence
Implementation Method 2
a common edge field generation device, the latter being arranged level with the active zone on a side of the passivation layer facing away from the semiconductor layer sequence for each semiconductor chip of the first group. The edge field generation device is configured to generate an electric field at least intermittently in edge regions of the active zones
Data Source
AI summary
An optoelectronic component may include a support and multiple optoelectronic semiconductor chips that can be actuated individually and independently of one another. Each semiconductor chip may include a semiconductor layer sequence. Each semiconductor chip may have an electrically insulating passivation layer on the respective lateral surface of the semiconductor layer sequence. The semiconductor chip(s) are assigned to a first group, which may be paired with a common boundary field generating device arranged on the passivation layer face facing away from the semiconductor layer sequence at an active zone for each semiconductor chip of the first group. The boundary field generating device is designed to at least temporarily generate an electric field in the boundary regions of the active zone so that a flow of current through the semiconductor layer sequences can be controlled in the boundary regions during the operation of the semiconductor chips of the first group.