Patterned Electron Blocking Layer for LED Voltage and Luminance

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Solution Overview

Problem

Existing light emitting diodes (LEDs) face challenges in maintaining luminance intensity while improving operation voltage, particularly in low voltage/high power driving devices, where the epitaxial structure needs optimization to balance recombination efficiency and voltage requirements.

Innovation Solution

The LED design incorporates an n-type semiconductor layer with roughness and recessed portions, an electron blocking layer with patterned thickness variations, and an undoped semiconductor layer to planarize the surface, enhancing electron blocking and hole movement efficiency, thereby increasing luminance intensity and reducing operation voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the operation voltage is improved (reduced), then the LED becomes suitable for low voltage/high power driving, but the luminance intensity may deteriorate

Engineering Contradiction:
Improveoperation voltageVSAvoidluminance intensity
Core Design Contradiction:
Use of energy by moving objectVSIllumination intensity

Solution Approach 1:

The electron blocking layer is designed with patterned thickness variations (first region with greater thickness, second region with lesser thickness) to create local quality differences. This allows different regions to perform different functions: the thicker first region provides stronger electron blocking to reduce leakage current and lower operation voltage, while the thinner second region maintains good light extraction and luminance intensity.

Inventive Principle:
Principle #3Local quality

2Illumination intensity

If the epitaxial structure is optimized to maintain luminance intensity, then the operation voltage improvement is limited, but if epitaxial structure is changed to improve operation voltage, then luminance intensity may deteriorate

Engineering Contradiction:
Improveluminance intensityVSAvoidoperation voltage
Core Design Contradiction:
Illumination intensityVSUse of energy by moving object

Solution Approach 1:

The patent employs a composite epitaxial structure combining multiple semiconductor layers with different properties: n-type GaN layer, light emitting layer, patterned electron blocking layer, and p-type GaN layer. This composite structure integrates the benefits of each layer to simultaneously achieve low operation voltage and high luminance intensity.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The electron blocking layer introduces dynamic adaptability through its patterned thickness design, allowing the device to dynamically optimize electron blocking efficiency and light extraction based on the local structural characteristics, thereby achieving both low voltage operation and high luminance.

Inventive Principle:
Principle #15Dynamics

3Device complexity

If a uniform electron blocking layer is used, then the structure is simple, but electron blocking efficiency and hole movement efficiency cannot be simultaneously optimized

Engineering Contradiction:
Improvestructure complexityVSAvoidelectron blocking efficiency
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The electron blocking layer is designed with patterned thickness variations (first region with greater thickness, second region with lesser thickness) to create local quality differences. This allows different regions to perform different functions: the thicker first region provides stronger electron blocking to reduce leakage current and lower operation voltage, while the thinner second region maintains good light extraction and luminance intensity.

Inventive Principle:
Principle #3Local quality

4Reliability

If the n-type semiconductor layer has roughness with recessed portions, then hole movement efficiency is improved, but the surface is non-planar requiring additional layers

Engineering Contradiction:
Improvehole movement efficiencyVSAvoidlayer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces controlled surface roughness parameters in the n-type GaN layer, creating recessed portions with specific depth and distribution. This parameter change improves hole movement efficiency by reducing dislocation-related resistance while the subsequent undoped layer planarizes the surface for subsequent processing.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves luminance intensity and reduces operation voltage by minimizing leakage current and dislocation-related resistance, resulting in enhanced light emitting efficiency and voltage optimization.

Implementation Method 1

an undoped semiconductor layer disposed on the n-type semiconductor layer to fill the roughness and planarize a top surface of the n-type semiconductor layer

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

an electron blocking layer over the light emitting layer... the electron blocking layer comprises a pattern having height differences so as to have a patterned interface with the p-type semiconductor layer

Methodology Applied
Scientific EffectElectron blocking: Electrical Resistance

Implementation Method 3

a light emitting layer over the n-type semiconductor layer... Light emitting diodes (LEDs) are compound semiconductor devices that convert electric energy into light energy

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Data Source

PatentEP2482343B1Semiconductor based light emitting diode
Publication Date: 2019.11.27 LG INNOTEK CO LTD
  • EP2482343B1 patent drawingFigure 1~2
  • EP2482343B1 patent drawingFigure 3a~3b
  • EP2482343B1 patent drawingFigure 4~5

AI summary

Provided are a light emitting diode, a method of fabricating the light emitting diode, a light emitting diode package, and a lighting system. The light emitting diode (100) comprises a first conductive type semiconductor layer (110), a light emitting layer (120) over the first conductive type semiconductor layer, an electron blocking layer (130) over the light emitting layer, and a second conductive type semiconductor layer (140) over the electron blocking layer. The electron blocking layer (130) comprises a pattern (131a,131b) having a height difference.