LED Insulation Walls for Conduction Reliability

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Solution Overview

Problem

Conventional light-emitting diode (LED) manufacturing processes face high failure rates due to misalignment of electrode materials and reduced light-emitting area caused by the need for insulating and conductive material deposition, which affects electrical conduction and light propagation.

Innovation Solution

The solution involves forming insulation walls on either side of the compound semiconductor structure, allowing N-type electrode layers to penetrate through these walls and connect with a conductive substrate, while maintaining electrical isolation from the P-type electrode structure, thereby simplifying the fabrication process and reducing conduction issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If insulating material and conductive material are deposited on the insulating material to provide electrical conduction between substrate and compound semiconductor layer, then electrical conduction is achieved, but misalignment occurs resulting in high failure rate

Engineering Contradiction:
Improveelectrical conduction reliabilityVSAvoidalignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by pre-forming through-holes in the insulating layer before depositing electrode materials. The through-holes are created with precise positioning, and electrode materials are then filled into these pre-defined pathways. This eliminates alignment issues during subsequent deposition steps, as the conductive paths are established before the electrode materials are applied, ensuring reliable electrical conduction without misalignment failures.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If insulating material and conductive material are deposited on the insulating material, then electrical conduction is provided, but space adjacent to compound semiconductor layer is required decreasing light-emitting area

Engineering Contradiction:
Improveelectrical conductionVSAvoidlight-emitting area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from a planar deposition approach to a three-dimensional through-hole filling approach. Instead of depositing materials on the surface adjacent to the compound semiconductor layer, the electrode materials are deposited vertically into through-holes that penetrate the insulating layer. This dimensional change allows electrical conduction paths to be established within the insulating layer itself, eliminating the need for adjacent surface space and maximizing the light-emitting area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If electrode material is covered with insulating material to have electrical insulation between electrodes, then electrical insulation is achieved, but fabrication process complexity increases

Engineering Contradiction:
Improveelectrical insulationVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the electrical insulation function from the traditional approach of covering electrodes with insulating material. Instead, the insulating layer serves as the primary insulation barrier, and through-holes are created through this layer to establish electrical connections. The electrode materials are confined within these through-holes, naturally providing electrical insulation between adjacent electrodes without requiring additional insulating coverage layers, thus simplifying the fabrication process.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP2506315B1Light-emitting diode and method of manufacturing the same
Publication Date: 2019.12.11 SAMSUNG ELECTRONICS CO LTD
  • EP2506315B1 patent drawingFigure 1~2
  • EP2506315B1 patent drawingFigure 3~4
  • EP2506315B1 patent drawingFigure 5~6

AI summary

A light-emitting device and a method of manufacturing the same are provided. The light-emitting device (100) includes a compound semiconductor structure (120) having a first N-type compound semiconductor layer (123), an active layer (122), and a P-type compound semiconductor layer (121), a P-type electrode layer (150) that is disposed on the P-type compound semiconductor layer and electrically connects with the P-type compound semiconductor layer, at least one insulation wall (131,132) disposed on the compound semiconductor structure and the P-type electrode layer, at least one N-type electrode layer (141,142) penetrating the at least one insulation wall, and a conductive substrate (170) in which at least one N-type electrode connecting layer (171,172) corresponding to the N-type electrode layer is separated from a P-type electrode connecting layer (173) corresponding to the P-type electrode layer.