LED P-Type Layer Resistivity Gradient for Charge Confinement
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Solution Overview
Problem
Conventional light-emitting diode (LED) display devices face inefficiencies in charge carrier flow due to uniform resistance in p-type semiconductor layers, which affects luminous efficiency.
Innovation Solution
Incorporating a p-type semiconductor layer with a low resistance portion enclosed by a high resistance portion, where the resistivity increases from low to high, and an intermediate layer between the p-type semiconductor layer and the bonding electrode, along with a transparent conductive layer connected to the n-type semiconductor layer, to enhance charge carrier flow and luminous efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a uniform resistance p-type semiconductor layer is used in LED devices, then the manufacturing process is simple, but the charge carrier flow efficiency is poor
Solution Approach 1:
The patent applies local quality by creating a non-uniform resistance distribution within the p-type semiconductor layer. Specifically, it introduces a low resistance portion (first region) with resistivity of 1Ω·cm or less, surrounded by a high resistance portion (second region) with resistivity greater than 1Ω·cm. This local differentiation optimizes charge carrier flow through the low resistance region while maintaining manufacturing feasibility through selective doping processes.
Solution Approach 2:
The patent implements parameter changes by varying the resistivity parameter within the p-type semiconductor layer. The low resistance portion has resistivity ρ1 ≤ 1Ω·cm, while the high resistance portion has resistivity ρ2 > 1Ω·cm, with the ratio ρ2/ρ1 being 10 or more. This parameter differentiation is achieved through controlled doping concentration variations, transforming a uniform structure into a functionally optimized non-uniform structure.
2Device complexity
If charge carriers are not confined in the p-type semiconductor layer, then the device structure is simple, but the luminous efficiency is low
Solution Approach 1:
The patent uses local quality to confine charge carriers by creating a low resistance portion (first region) with resistivity of 1Ω·cm or less, which acts as a charge carrier confinement region. This low resistance path guides and concentrates charge carriers toward the active layer, improving recombination efficiency and luminous output without requiring complex external confinement structures.
Solution Approach 2:
The patent introduces an intermediate layer between the p-type semiconductor layer and the bonding electrode. This intermediate layer serves as a mediator that facilitates efficient charge carrier extraction and transport from the p-type layer to the electrode, reducing energy loss and improving overall device efficiency without adding significant structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves charge carrier flow through the low resistance portion, enhancing the luminous efficiency of the LED device by confining charge carriers within the low resistance area, thereby improving light emission efficiency.
Implementation Method 1
A resistivity of the p type semiconductor layer increases from the low resistance portion toward the high resistance portion
Implementation Method 2
light emitting diodes (LEDs) have become popular in general and commercial lighting applications
Data Source
AI summary
A display device includes a substrate, at least one bonding electrode, at least one LED device electrically connected to the bonding electrode, and a transparent conductive layer. The bonding electrode is between the LED device and the substrate. The LED device includes a n type semiconductor layer, a p type semiconductor layer between the n type semiconductor layer and the bonding electrode, and an intermediate layer. The p type semiconductor layer includes a high resistance portion and a low resistance portion enclosed by the high resistance portion. A resistivity of the p type semiconductor layer increases from the low resistance portion toward the high resistance portion. The intermediate layer is between the p type semiconductor layer and the bonding electrode. The transparent conductive layer is electrically connected to the n type semiconductor layer. The LED device is between the transparent conductive layer and the bonding electrode.


