LED Resistance Layer for Luminous Intensity Control
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Solution Overview
Problem
Existing LED manufacturing methods face challenges in efficiently controlling luminous intensity for varying display sizes, leading to increased production costs and reduced efficiency when only current or chip size is adjusted.
Innovation Solution
The method involves forming a resistance layer on the LED to control the effective area of the active layer, allowing for simultaneous adjustment of current intensity and external quantum efficiency, thereby maintaining required luminous intensity without altering the size of other layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If the chip size is controlled to satisfy required luminous intensity, then the luminous intensity requirement is met, but various production lines are required thereby increasing unit cost of production
Solution Approach 1:
The patent applies local quality by forming a resistance layer in specific regions around the active layer while leaving the central active layer intact. This allows different regions of the LED to have different electrical properties - the active layer maintains high current flow for light emission, while the surrounding resistance layer limits current flow to control overall luminous intensity. This enables a single chip size to produce multiple luminous intensity levels through selective regional modification.
Solution Approach 2:
The patent changes the electrical resistance parameter in specific regions by forming a resistance layer with controlled thickness and material composition. By adjusting the resistance layer's parameters (thickness, material, doping concentration), the patent can control the amount of current flowing through the LED without changing the chip size, thereby achieving different luminous intensity levels from the same chip dimensions.
2Illumination intensity
If only the amount of current is controlled to satisfy required luminous intensity, then the luminous intensity requirement is met, but efficiency is lowered
Solution Approach 1:
The resistance layer is formed selectively in regions surrounding the active layer, creating a spatial distribution of electrical resistance. This local quality approach ensures that current flows efficiently through the active layer where light emission occurs, while the resistance layer gently limits overall current without causing excessive voltage drops or energy losses that would occur with uniform current control methods.
Solution Approach 2:
The resistance layer acts as an intermediary element between the electrode and the active layer. It provides gradual current limitation and distribution, mediating the current flow to optimize both luminous intensity control and energy efficiency. The resistance layer prevents excessive current concentration while maintaining efficient current utilization in the active region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach maintains current intensity and external quantum efficiency while reducing production costs by allowing for precise control of the active layer area, effectively addressing the variability in luminous intensity requirements across different display sizes.
Implementation Method 1
a resistance layer (70) is formed by etching a region, where the active layer (40), the p-type semiconductor layer (50), and the p-type electrode (60) are stacked
Data Source
Figure 1~3C
Figure 3D~3H
Figure 4~5B
AI summary
A method of manufacturing a light emitting diode (LED) is provided. The method includes forming an n-type semiconductor layer on a substrate, forming an n-type electrode in a first region of the n-type semiconductor layer, forming an active layer in a second region of the n-type semiconductor layer, the second region being a region other than the first region, forming a p-type semiconductor layer on the active layer, and forming a resistance layer by etching regions of the active layer and the p-type semiconductor layer.