Level-Shift Circuit Node Stabilization for 50% Duty Ratio
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Solution Overview
Problem
Level-shift circuits with tolerant structures face challenges in achieving high-speed signal transmission due to delays in state transitions and uneven duty ratios, primarily caused by the use of MOS transistors with stack configurations that result in intermediate nodes becoming high impedance, leading to fluctuating delay periods and duty ratios that do not reach 50%.
Innovation Solution
The implementation of a semiconductor integrated circuit with a level-shift circuit that stabilizes the voltage of intermediate nodes using a switch circuit and synthesizes differential outputs, ensuring a constant delay period and achieving a duty ratio of 50% by utilizing additional transistors as switch circuits and a synthesis circuit to stabilize node voltages and combine signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MOS transistors with stack configuration are used to implement tolerant function, then voltage protection is achieved, but state transition delay increases and duty ratio cannot reach 50%
Solution Approach 1:
A dedicated switch circuit is introduced as an intermediary component to control the intermediate node voltage independently from the stack configuration transistors. This switch circuit acts as a mediator that can actively drive the node to predetermined voltage levels, decoupling the voltage protection function from the signal transmission path and eliminating the delay caused by the stack configuration.
Solution Approach 2:
The level-shift circuit is segmented into distinct functional blocks: the stack configuration transistors handle voltage protection while a separate switch circuit handles signal transmission timing. This segmentation allows each component to be optimized for its specific function, with the switch circuit providing rapid state transitions without being constrained by the voltage protection requirements of the stack transistors.
2Reliability
If MOS transistors with stack configuration are used to implement tolerant function, then voltage protection is achieved, but duty ratio of output does not reach 50%
Solution Approach 1:
The switch circuit serves as an intermediary that actively controls the intermediate node voltage to predetermined levels, ensuring symmetric rise and fall times. This active control compensates for the asymmetric behavior introduced by the stack configuration, forcing the output duty ratio to reach the desired 50% while the stack transistors continue to provide voltage protection.
Solution Approach 2:
The switch circuit dynamically adjusts the intermediate node voltage based on the signal state, providing active drive during both rising and falling edges. This dynamic control ensures that the output waveform maintains a 50% duty ratio by compensating for the static limitations of the stack configuration, allowing the circuit to adapt its behavior to maintain optimal signal characteristics.
Data Source
AI summary
A semiconductor integrated circuit of embodiments includes a first MOS transistor configured to control conduction and non-conduction between a reference voltage point and a node, a second MOS transistor connected to the first MOS transistor via the node and configured to apply a voltage equal to or lower than a withstand voltage of the first MOS transistor to the node, a third MOS transistor configured to receive supply of a second voltage higher than the first voltage, and output an output signal of a signal level corresponding to a voltage range of the second voltage, and a switch circuit configured to make a voltage of the node a fixed voltage when the first MOS transistor is in an OFF state.