Level Shifter Feedback Circuit for Structural Fault Testing
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Solution Overview
Problem
State-of-the-art system on chip devices (SOCs) lack structural testing of power domain crossings between digital synthesized logic and analog macros, leading to fault coverage holes in production test and functional safety.
Innovation Solution
A level shifter test circuit with feedback logic is introduced, incorporating XOR logic gates and end gates to protect output signals, allowing for structural testing of level shifters and detecting defects such as soft and latent defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If structural testing is added to level shifters, then defect detection capability is improved, but device complexity increases
Solution Approach 1:
The test circuit is nested within the existing level shifter structure by tapping feedback signals from intermediate stages. The XOR gates and test logic are integrated into the signal path without requiring separate external testing infrastructure, allowing defect detection while maintaining compact design.
Solution Approach 2:
Feedback signals serve as intermediaries that carry test information from the level shifter output back to the test logic. These feedback paths enable structural testing by mediating between the level shifter operation and the test evaluation without disrupting the primary signal flow.
2Reliability
If feedback signals are used for testing, then test coverage is improved, but signal integrity is compromised
Solution Approach 1:
The output signal is segmented into multiple paths: the main output signal path and the feedback signal path. This segmentation allows the feedback path to be used for testing while the main output path remains undisturbed, preserving signal integrity for the primary function.
Solution Approach 2:
Different portions of the signal are treated differently: the main output signal maintains its original quality for functional operation, while a copied feedback portion is used for testing. This local differentiation ensures that testing activities do not degrade the quality of the primary signal.
3Reliability
If end gates are added to protect output signals, then safety is improved, but device complexity increases
Solution Approach 1:
End gates are positioned at the output stage to preliminarily protect signals before they leave the level shifter. This preliminary protection ensures that any potential faults are contained and safe states are enforced before signals affect other circuitry, enhancing safety without requiring complex post-processing protection.
Data Source
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Figure 3A
Figure 3B
AI summary
A level shifter test circuit, method of testing a level shifter test circuit and a semiconductor chip are provided. The circuit comprises a first level shifter for translating a signal from a first domain to a second domain. The first level shifter configured to receive the signal as an input from the first domain; and output a translated signal which has been translated by the first level shifter for the second domain, wherein the translated signal is split between a first output signal and a first level shifter feedback signal. The circuit further comprises test logic configured to receive the first level shifter feedback signal and test operation of the first level shifter.