Voltage Level Shifter Circuit for Low-Vmin Signal Conversion

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Solution Overview

Problem

Voltage level shifter circuits face challenges in reducing the minimum operating voltage (Vmin) across varying process, voltage, and temperature conditions, leading to increased power consumption in integrated circuits with different supply voltage domains.

Innovation Solution

The implementation of adaptive keeper circuitry, enhanced interruptible supply circuitry, and capacitive boosting circuitry within voltage level shifter circuits to reduce the minimum operating voltage (Vmin), allowing for lower supply voltage operation and reduced power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If conventional voltage level shifter circuits are used, then voltage level conversion between different supply voltage domains is achieved, but the minimum operating voltage (Vmin) remains high leading to increased power consumption

Engineering Contradiction:
Improvepower consumptionVSAvoidminimum operating voltage
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent implements adaptive keeper circuitry that dynamically adjusts the keeper strength based on operating conditions (process, voltage, temperature variations). The keeper circuit transitions from a static design to a dynamic one that can adapt its behavior to maintain reliable operation at lower voltages while minimizing power consumption. This is achieved through control signals that modify the keeper transistor operation based on detected voltage levels and environmental conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs enhanced interruptible supply circuitry that changes the supply voltage parameters dynamically. The circuit can interrupt and restore the supply voltage to the logic circuitry in a controlled manner, allowing the system to operate at reduced voltage levels during normal operation while maintaining the capability to restore full voltage for stable operation when needed. This parameter change enables lower average power consumption while preserving minimum operating voltage requirements.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If the minimum operating voltage is reduced to lower power consumption, then power efficiency improves, but contention and delay issues arise in the voltage level shifter circuit

Engineering Contradiction:
Improvepower consumptionVSAvoidsignal transmission speed
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent implements capacitive boosting circuitry that performs preliminary action by pre-charging the output signal lines before the actual voltage transition occurs. The circuit uses capacitors to store charge and deliver it during critical transition periods, ensuring that signal edges remain sharp and transmission delays are minimized even when operating at lower voltages. This preliminary energy storage and release prevents signal degradation and maintains productivity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces intermediate voltage levels and buffering stages that act as mediators between the low-voltage input domain and the output domain. The enhanced interruptible supply circuitry provides intermediate supply voltage levels that allow gradual transitions rather than abrupt changes, reducing contention effects while maintaining signal integrity and transmission speed. These intermediary elements smooth out the voltage transitions and prevent direct conflict between opposing signal drives.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP3224956B1Voltage level shifter circuit
Publication Date: 2019.11.20 INTEL CORP
  • EP3224956B1 patent drawingFigure 1
  • EP3224956B1 patent drawingFigure 2
  • EP3224956B1 patent drawingFigure 3

AI summary

Embodiments include apparatuses, methods, and systems for voltage level shifting a data signal between a low voltage domain and a high voltage domain. In embodiments, a voltage level shifter circuit may include adaptive keeper circuitry, enhanced interruptible supply circuitry, and/or capacitive boosting circuitry to reduce a minimum voltage of the low voltage domain that is supported by the voltage level shifter circuit. Other embodiments may be described and claimed.