Level Shifter SCR Layout for High-Voltage ESD Self-Protection
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Solution Overview
Problem
High voltage semiconductor devices face challenges in managing electrostatic discharge (ESD) currents, which can damage internal components and require large chip areas for existing ESD structures.
Innovation Solution
Incorporation of silicon controlled rectifiers (SCRs) in a guard ring and other regions of the semiconductor device to quickly dissipate ESD currents, forming a low-resistance discharge path.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ESD structures are used to block high ESD currents, then device reliability is improved, but chip area increases significantly
Solution Approach 1:
The patent combines the ESD protection function with the level shifter circuit by integrating SCR structures directly into the level shifter's source, gate, and drain regions. This merging eliminates the need for separate dedicated ESD protection circuits, thereby reducing chip area while maintaining ESD protection capability.
Solution Approach 2:
The level shifter circuit is designed to perform dual functions: normal signal level shifting operation and ESD protection. The SCR structures embedded in the level shifter regions enable the circuit to automatically activate ESD protection mode when exposed to electrostatic discharge, making the circuit universal for both purposes.
2Reliability
If multiple SCR structures are integrated into the level shifter regions, then ESD protection capability is improved, but device complexity increases
Solution Approach 1:
The ESD protection is segmented into multiple independent SCR structures distributed across different regions of the level shifter (source region with second SCR, gate region with third SCR, drain region with fourth SCR, and guard ring with first SCR). Each SCR independently protects its respective region, providing comprehensive ESD protection while maintaining modular simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents damage to internal components by effectively dissipating ESD currents, reducing the risk of device failure and minimizing chip area requirements.
Implementation Method 1
high ESD currents can flow through several components of the HV semiconductor device
Implementation Method 2
a first silicon controlled rectifier (SCR) disposed in the guard ring and comprising a first P-type highly doped (P+) region and a first N-type highly doped (N+) region formed on the semiconductor substrate
Data Source
AI summary
A semiconductor device includes a high side region and a low side region formed on a semiconductor substrate; a level shifter formed between the high side region and the low side region and including a source region, a gate region and a drain region; a guard ring formed adjacent to the level shifter; a first silicon controlled rectifier (SCR) disposed in the guard ring and including a first P-type highly doped (P+) region and a first N-type highly doped (N+) region formed on the semiconductor substrate; a second SCR disposed in the source region and including a second P+ region and a second N+ region; a third SCR disposed in the gate region and including a third P+ region and a third N+ region; and a fourth SCR disposed in the drain region and including a fourth P+ region and a fourth N+ region.