Level Shifter Surge Protection via Shield Gate
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Solution Overview
Problem
Conventional high voltage integrated circuits (HVICs) experience malfunction due to surge voltage, where the drain potential of the level shifter temporarily exceeds the VB potential and becomes approximately equal to the VS potential, even when the gate is not turned on, leading to erroneous output.
Innovation Solution
A semiconductor device with a first conductivity type base body, a second conductivity type well region, a voltage blocking area with lower impurity concentration, a level shifter having a second conductivity type drift region and carrier reception region, a first conductivity type base region, a gate electrode insulated on the base region, and a second gate electrode on the isolation region, which is alternatively set to a potential higher than the first potential to prevent inversion layer formation and ensure correct signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a p-type isolation region is used to isolate the n-type well region and n-type drift region, then electrical isolation is achieved, but inversion layer formation causes short-circuiting of VB and Dr potentials
Solution Approach 1:
A shield layer is introduced as an intermediary conductive structure positioned between the n-type well region and n-type drift region. This shield layer is connected to the VS potential and acts as a mediator to prevent inversion layer formation in the p-type isolation region by establishing an electric field that repels charge carriers, thereby blocking the harmful short-circuiting effect while maintaining electrical isolation.
Solution Approach 2:
The shield layer connected to VS potential applies a preliminary counteracting electric field to prevent the formation of inversion layers in the p-type isolation region before they can cause short-circuiting. By establishing this protective electric field in advance, the invention preemptively blocks the harmful effect of charge carrier accumulation that would otherwise occur under surge voltage conditions.
2Reliability
If the Dr potential is allowed to exceed VB potential during negative voltage surge, then the level shifter responds to surge conditions, but the Dr potential decreases to approximately VS potential causing erroneous output inversion
Solution Approach 1:
The shield layer connected to VS potential provides a cushioning electric field that absorbs and mitigates the impact of negative voltage surges on the Dr potential. When surge voltage causes Dr potential to exceed VB potential, the shield layer's electric field acts as a cushion to prevent excessive potential increase, and subsequently prevents Dr potential from dropping to VS potential level, thereby cushioning against erroneous output inversion.
3Object-generated harmful factors
If a shield layer fixed to Dr potential or VS potential is provided above the p-type isolation region, then inversion layer formation is prevented, but malfunction occurs under surge voltage conditions
Solution Approach 1:
The invention changes the potential parameter of the shield layer from being fixed to Dr potential or VS potential (conventional approaches) to being fixed to VB potential (high side power supply potential). This parameter change ensures that under surge voltage conditions when Dr potential fluctuates, the shield layer maintains a stable reference potential that effectively prevents inversion layer formation while avoiding the malfunction that occurs with Dr-potential-fixed shields.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses malfunction of the level shifter by preventing short-circuiting of VB and Dr potentials, maintaining accurate signal transmission even under surge conditions.
Implementation Method 1
When an inversion layer is formed in the p-type isolation region due to surface charges or the like, the VB potential and the Dr potential are short-circuited
Data Source
AI summary
A semiconductor device includes: a first conductivity type base body; a second conductivity type well region provided on the base body and formed with a high potential side circuit; a second conductivity type voltage blocking area provided to surround a periphery of the well region; a level shifter having a second conductivity type drift region provided on the base body, a second conductivity type carrier reception region provided in an upper part of the drift region, a first conductivity type base region provided in contact with the drift region, a first gate electrode provided on the base region, and a second conductivity type carrier supply region provided in an upper part of the base region; a first conductivity type isolation region provided between the voltage blocking area and the drift region on the base body; and a second gate electrode on the isolation region.