Level Shifter Circuit With Zero Static Current Latching
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Solution Overview
Problem
Conventional level shifters fail to address both high-speed and low-power requirements, leading to power hungry designs that drain battery life in devices like mobile phones, with existing architectures either consuming high power at high speeds or failing to meet low power needs, and causing issues with glitch energy, slew rates, and duty cycle degradation.
Innovation Solution
A zero-static high-speed, low power level shifter circuit is implemented, featuring a level shifter coupled with a sensing circuit that turns off switching circuits after output voltage transitions, eliminating static current and using peak current only during transitions, thereby reducing power consumption and improving signal quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional level shifters operate at high speed, then signal transmission speed is improved, but power consumption increases
Solution Approach 1:
The level shifter uses periodic switching action where the switching circuit is activated only during the transition period and deactivated during steady state. This periodic operation allows the circuit to achieve high-speed signal transmission when needed while consuming minimal power during stable operation, resolving the contradiction between speed and power consumption.
Solution Approach 2:
The invention implements dynamic operation by making the switching circuit controllable and adaptive. The circuit transitions between active and inactive states based on the signal condition, allowing it to provide high-speed performance dynamically when required while reducing power consumption dynamically when the signal is stable, thus resolving the speed-power tradeoff.
2Reliability
If conventional level shifters maintain continuous operation, then signal integrity is maintained, but static current drains battery power
Solution Approach 1:
The invention extracts and eliminates the continuous static current path from the level shifter design. By removing the always-on current path and replacing it with a controlled switching mechanism, the circuit maintains signal integrity when needed while eliminating unnecessary power drain during stable operation, thus resolving the contradiction between reliability and energy loss.
Solution Approach 2:
The level shifter implements self-service by automatically activating the switching circuit only when signal transitions are detected and deactivating it during stable states. This self-regulating behavior ensures signal integrity is maintained during transitions while minimizing power consumption during steady states, resolving the contradiction between reliability and energy loss.
3Adaptability or versatility
If level shifters are used in multiple paths (control, data, clock), then complete signal level shifting is achieved, but total current increases
Solution Approach 1:
The invention achieves multi-functionality by designing a universal level shifter architecture that can be applied to multiple signal paths (control, data, clock) using the same switching mechanism. This universal design allows the circuit to handle various signal types efficiently without requiring separate always-on circuits for each path, thus maintaining adaptability while reducing total current consumption.
Data Source
AI summary
Described is a high speed, low power level shifter circuit which includes a level shifter coupled to a sensing circuit. The level shifter includes a pair of source transistors, a pair of input transistors, and a pair of switching circuits connected between the source transistors and the input transistors. The sensing circuit turns off a switching circuit on an active side of the level shifter based on detecting that an output voltage of the level shifter has completed a voltage level transition from a first logic level voltage to a second logic level voltage. An open circuit is established on the active side and turns off the pair of source transistors. The other switching circuit is turned on. Static current flow on the active side of the level shifter is stopped and the output voltage is latched to a voltage representative of the second logic level voltage.