Light Emitting Layer Structure With Voids for Dislocation Blocking

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Solution Overview

Problem

Lattice mismatch and thermal expansion coefficient differences between substrates and nitride-based semiconductor layers in light emitting devices lead to increased dislocation and crack densities, affecting device performance.

Innovation Solution

Incorporating a dislocation blocking layer with holes and voids between semiconductor layers to prevent dislocation and crack propagation, which involves a specific stacking structure and manufacturing process including recess formation and three-dimensional growth of semiconductor layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a nitride-based semiconductor layer is formed on a substrate, then the light emitting device can be manufactured, but dislocation and crack density increases due to lattice mismatch and thermal expansion coefficient differences

Engineering Contradiction:
Improvemanufacturability of light emitting deviceVSAvoiddislocation and crack density
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces a dislocation blocking layer with a periodic hole structure that segments the semiconductor layer into multiple regions. This segmentation prevents dislocations from propagating continuously through the layer, effectively reducing dislocation density while maintaining the overall structural integrity and manufacturability of the light emitting device.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dislocation blocking layer acts as an intermediary structure between the substrate and the active semiconductor layers. This intermediate layer with periodic holes serves as a barrier that mediates the stress and dislocation transmission, preventing defects from the substrate from reaching the active regions while allowing the device to be manufactured on standard substrates.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If dislocation blocking structures are introduced to reduce dislocation density, then device performance improves, but manufacturing process complexity increases

Engineering Contradiction:
Improvedevice performanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dislocation blocking layer employs a porous structure with periodic holes rather than solid continuous structures. This porous design achieves effective dislocation blocking while using less material and creating a simpler fabrication process compared to solid barrier layers, as the holes can be formed through straightforward etching processes after depositing the blocking layer.

Inventive Principle:
Principle #31Porous materials

Solution Approach 2:

The dislocation blocking layer with periodic holes is formed in advance before the active semiconductor layers are deposited. This preliminary action establishes the dislocation barrier structure early in the manufacturing process, allowing subsequent layers to be grown without concern for dislocation propagation, thereby simplifying the overall manufacturing sequence while achieving high device performance.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20230275183A1Light emitting device and method of manufacturing the same
Publication Date: 2023.08.31 SAMSUNG ELECTRONICS CO LTD
  • US20230275183A1 patent drawing
  • US20230275183A1 patent drawing
  • US20230275183A1 patent drawing

AI summary

A light emitting device is provided. The light emitting device includes: a first semiconductor layer; a dislocation blocking layer on an upper surface of the first semiconductor layer and having a plurality of holes formed therein; a second semiconductor layer on the dislocation blocking layer; a third semiconductor layer on the second semiconductor layer; an active layer on the third semiconductor layer; and a fourth semiconductor layer on the active layer. A plurality of voids, which respectively overlap the plurality of holes along a vertical direction perpendicular to the upper surface of the first semiconductor layer, are provided between the first semiconductor layer and the second semiconductor layer.